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@@ -56,13 +56,13 @@ static __global__ void quantize_mmq_q8_1(
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constexpr int vals_per_scale = ds_layout == MMQ_Q8_1_DS_LAYOUT_D2S6 ? 64 : 32;
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constexpr int vals_per_sum = ds_layout == MMQ_Q8_1_DS_LAYOUT_D2S6 ? 16 : 32;
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- const int64_t i0 = ((int64_t)blockDim.x*blockIdx.x + threadIdx.x)*4;
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+ const int64_t i0 = ((int64_t)blockDim.x*blockIdx.y + threadIdx.x)*4;
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if (i0 >= ne0) {
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return;
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}
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- const int64_t i1 = blockIdx.y;
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+ const int64_t i1 = blockIdx.x;
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const int64_t i2 = blockIdx.z % ne2;
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const int64_t i3 = blockIdx.z / ne2;
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@@ -75,8 +75,8 @@ static __global__ void quantize_mmq_q8_1(
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block_q8_1_mmq * y = (block_q8_1_mmq *) vy;
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- const int64_t ib0 = blockIdx.z*((int64_t)gridDim.y*gridDim.x*blockDim.x/QK8_1); // first block of channel
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- const int64_t ib = ib0 + (i0 / (4*QK8_1))*ne1 + blockIdx.y; // block index in channel
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+ const int64_t ib0 = blockIdx.z*((int64_t)gridDim.x*gridDim.y*blockDim.x/QK8_1); // first block of channel
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+ const int64_t ib = ib0 + (i0 / (4*QK8_1))*ne1 + blockIdx.x; // block index in channel
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const int64_t iqs = i0 % (4*QK8_1); // quant index in block
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// Load 4 floats per thread and calculate max. abs. value between them:
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@@ -166,8 +166,9 @@ void quantize_mmq_q8_1_cuda(
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GGML_ASSERT(ne00 % 4 == 0);
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GGML_ASSERT(ne0 % (4*QK8_1) == 0);
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- const int64_t block_num_x = (ne0 + 4*CUDA_QUANTIZE_BLOCK_SIZE_MMQ - 1) / (4*CUDA_QUANTIZE_BLOCK_SIZE_MMQ);
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- const dim3 num_blocks(block_num_x, ne1, ne2*ne3);
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+ // ne1 tends to assume the highest values, therefore use it as the "x" dimension of the CUDA grid:
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+ const int64_t block_num_y = (ne0 + 4*CUDA_QUANTIZE_BLOCK_SIZE_MMQ - 1) / (4*CUDA_QUANTIZE_BLOCK_SIZE_MMQ);
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+ const dim3 num_blocks(ne1, block_num_y, ne2*ne3);
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const dim3 block_size(CUDA_QUANTIZE_BLOCK_SIZE_MMQ, 1, 1);
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switch (mmq_get_q8_1_ds_layout(type_src0)) {
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case MMQ_Q8_1_DS_LAYOUT_D4:
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