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@@ -1,5 +1,6 @@
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#include "concat.cuh"
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#include "concat.cuh"
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+// contiguous kernels
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static __global__ void concat_f32_dim0(const float * x, const float * y, float * dst, const int ne0, const int ne00) {
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static __global__ void concat_f32_dim0(const float * x, const float * y, float * dst, const int ne0, const int ne00) {
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int nidx = threadIdx.x + blockIdx.x * blockDim.x;
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int nidx = threadIdx.x + blockIdx.x * blockDim.x;
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if (nidx >= ne0) {
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if (nidx >= ne0) {
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@@ -92,39 +93,104 @@ static void concat_f32_cuda(const float * x, const float * y, float * dst, int n
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concat_f32_dim2<<<gridDim, CUDA_CONCAT_BLOCK_SIZE, 0, stream>>>(x, y, dst, ne0, ne02);
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concat_f32_dim2<<<gridDim, CUDA_CONCAT_BLOCK_SIZE, 0, stream>>>(x, y, dst, ne0, ne02);
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}
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}
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+// non-contiguous kernel (slow)
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+static __global__ void concat_f32_non_cont(
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+ const char * src0,
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+ const char * src1,
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+ char * dst,
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+ int64_t ne00,
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+ int64_t ne01,
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+ int64_t ne02,
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+ int64_t ne03,
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+ uint64_t nb00,
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+ uint64_t nb01,
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+ uint64_t nb02,
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+ uint64_t nb03,
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+ int64_t /*ne10*/,
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+ int64_t /*ne11*/,
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+ int64_t /*ne12*/,
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+ int64_t /*ne13*/,
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+ uint64_t nb10,
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+ uint64_t nb11,
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+ uint64_t nb12,
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+ uint64_t nb13,
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+ int64_t ne0,
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+ int64_t /*ne1*/,
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+ int64_t /*ne2*/,
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+ int64_t /*ne3*/,
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+ uint64_t nb0,
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+ uint64_t nb1,
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+ uint64_t nb2,
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+ uint64_t nb3,
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+ int32_t dim) {
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+ const int64_t i3 = blockIdx.z;
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+ const int64_t i2 = blockIdx.y;
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+ const int64_t i1 = blockIdx.x;
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+
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+ int64_t o[4] = {0, 0, 0, 0};
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+ o[dim] = dim == 0 ? ne00 : (dim == 1 ? ne01 : (dim == 2 ? ne02 : ne03));
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+
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+ const float * x;
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+
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+ for (int i0 = threadIdx.x; i0 < ne0; i0 += blockDim.x) {
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+ if (i0 < ne00 && i1 < ne01 && i2 < ne02 && i3 < ne03) {
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+ x = (const float *)(src0 + (i3 )*nb03 + (i2 )*nb02 + (i1 )*nb01 + (i0 )*nb00);
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+ } else {
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+ x = (const float *)(src1 + (i3 - o[3])*nb13 + (i2 - o[2])*nb12 + (i1 - o[1])*nb11 + (i0 - o[0])*nb10);
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+ }
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+
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+ float * y = (float *)(dst + i3*nb3 + i2*nb2 + i1*nb1 + i0*nb0);
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+
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+ *y = *x;
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+ }
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+}
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+
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+
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void ggml_cuda_op_concat(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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void ggml_cuda_op_concat(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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const ggml_tensor * src0 = dst->src[0];
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const ggml_tensor * src0 = dst->src[0];
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const ggml_tensor * src1 = dst->src[1];
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const ggml_tensor * src1 = dst->src[1];
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- const float * src0_d = (const float *)src0->data;
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- const float * src1_d = (const float *)src1->data;
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-
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- float * dst_d = (float *)dst->data;
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cudaStream_t stream = ctx.stream();
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cudaStream_t stream = ctx.stream();
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const int32_t dim = ((int32_t *) dst->op_params)[0];
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const int32_t dim = ((int32_t *) dst->op_params)[0];
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- GGML_ASSERT(ggml_is_contiguous(src0));
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- GGML_ASSERT(ggml_is_contiguous(src1));
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-
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GGML_ASSERT(src0->type == GGML_TYPE_F32);
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GGML_ASSERT(src0->type == GGML_TYPE_F32);
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GGML_ASSERT(src1->type == GGML_TYPE_F32);
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GGML_ASSERT(src1->type == GGML_TYPE_F32);
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- GGML_ASSERT(dst->type == GGML_TYPE_F32);
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-
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- if (dim != 3) {
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- for (int i3 = 0; i3 < dst->ne[3]; i3++) {
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- concat_f32_cuda(
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- src0_d + i3 * (src0->nb[3] / 4),
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- src1_d + i3 * (src1->nb[3] / 4),
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- dst_d + i3 * ( dst->nb[3] / 4),
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- src0->ne[0], src0->ne[1], src0->ne[2],
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- dst->ne[0], dst->ne[1], dst->ne[2], dim, stream);
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+ GGML_ASSERT(dst->type == GGML_TYPE_F32);
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+
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+ if (ggml_is_contiguous(src0) && ggml_is_contiguous(src1)) {
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+ const float * src0_d = (const float *)src0->data;
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+ const float * src1_d = (const float *)src1->data;
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+
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+ float * dst_d = (float *)dst->data;
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+
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+ if (dim != 3) {
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+ for (int i3 = 0; i3 < dst->ne[3]; i3++) {
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+ concat_f32_cuda(
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+ src0_d + i3 * (src0->nb[3] / 4),
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+ src1_d + i3 * (src1->nb[3] / 4),
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+ dst_d + i3 * ( dst->nb[3] / 4),
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+ src0->ne[0], src0->ne[1], src0->ne[2],
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+ dst->ne[0], dst->ne[1], dst->ne[2], dim, stream);
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+ }
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+ } else {
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+ const size_t size0 = ggml_nbytes(src0);
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+ const size_t size1 = ggml_nbytes(src1);
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+
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+ CUDA_CHECK(cudaMemcpyAsync(dst_d, src0_d, size0, cudaMemcpyDeviceToDevice, stream));
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+ CUDA_CHECK(cudaMemcpyAsync(dst_d + size0/4, src1_d, size1, cudaMemcpyDeviceToDevice, stream));
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}
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}
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} else {
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} else {
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- const size_t size0 = ggml_nbytes(src0);
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- const size_t size1 = ggml_nbytes(src1);
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-
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- CUDA_CHECK(cudaMemcpyAsync(dst_d, src0_d, size0, cudaMemcpyDeviceToDevice, stream));
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- CUDA_CHECK(cudaMemcpyAsync(dst_d + size0/4, src1_d, size1, cudaMemcpyDeviceToDevice, stream));
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+ dim3 grid_dim(dst->ne[1], dst->ne[2], dst->ne[3]);
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+ concat_f32_non_cont<<<grid_dim, CUDA_CONCAT_BLOCK_SIZE, 0, stream>>>(
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+ (const char *)src0->data,
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+ (const char *)src1->data,
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+ ( char *)dst->data,
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+ src0->ne[0], src0->ne[1], src0->ne[2], src0->ne[3],
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+ src0->nb[0], src0->nb[1], src0->nb[2], src0->nb[3],
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+ src1->ne[0], src1->ne[1], src1->ne[2], src1->ne[3],
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+ src1->nb[0], src1->nb[1], src1->nb[2], src1->nb[3],
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+ dst->ne[0], dst->ne[1], dst->ne[2], dst->ne[3],
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+ dst->nb[0], dst->nb[1], dst->nb[2], dst->nb[3], dim);
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}
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}
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}
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}
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