ggml-cuda.cu 35 KB

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  1. #include <cstddef>
  2. #include <cstdint>
  3. #include <stdint.h>
  4. #include <stdio.h>
  5. #include <atomic>
  6. #include <cuda_runtime.h>
  7. #include <cublas_v2.h>
  8. #include <cuda_fp16.h>
  9. #include "ggml-cuda.h"
  10. #include "ggml.h"
  11. static_assert(sizeof(half) == sizeof(ggml_fp16_t), "wrong fp16 size");
  12. #define CUDA_CHECK(err) \
  13. do { \
  14. cudaError_t err_ = (err); \
  15. if (err_ != cudaSuccess) { \
  16. fprintf(stderr, "CUDA error %d at %s:%d: %s\n", err_, __FILE__, __LINE__, \
  17. cudaGetErrorString(err_)); \
  18. exit(1); \
  19. } \
  20. } while (0)
  21. #define CUBLAS_CHECK(err) \
  22. do { \
  23. cublasStatus_t err_ = (err); \
  24. if (err_ != CUBLAS_STATUS_SUCCESS) { \
  25. fprintf(stderr, "cuBLAS error %d at %s:%d\n", err_, __FILE__, __LINE__); \
  26. exit(1); \
  27. } \
  28. } while (0)
  29. typedef void (*dequantize_kernel_t)(const void * vx, const int ib, const int iqs, float & v0, float & v1);
  30. typedef void (*to_fp32_cuda_t)(const void * x, float * y, int k, cudaStream_t stream);
  31. typedef void (*dequantize_mul_mat_vec_cuda_t)(const void * vx, const float * y, float * dst, const int ncols, const int nrows, cudaStream_t stream);
  32. // QK = number of values after dequantization
  33. // QR = QK / number of values before dequantization
  34. #define QK4_0 32
  35. #define QR4_0 2
  36. typedef struct {
  37. half d; // delta
  38. uint8_t qs[QK4_0 / 2]; // nibbles / quants
  39. } block_q4_0;
  40. static_assert(sizeof(block_q4_0) == sizeof(ggml_fp16_t) + QK4_0 / 2, "wrong q4_0 block size/padding");
  41. #define QK4_1 32
  42. #define QR4_1 2
  43. typedef struct {
  44. half d; // delta
  45. half m; // min
  46. uint8_t qs[QK4_1 / 2]; // nibbles / quants
  47. } block_q4_1;
  48. static_assert(sizeof(block_q4_1) == sizeof(ggml_fp16_t) * 2 + QK4_1 / 2, "wrong q4_1 block size/padding");
  49. #define QK5_0 32
  50. #define QR5_0 2
  51. typedef struct {
  52. half d; // delta
  53. uint8_t qh[4]; // 5-th bit of quants
  54. uint8_t qs[QK5_0 / 2]; // nibbles / quants
  55. } block_q5_0;
  56. static_assert(sizeof(block_q5_0) == sizeof(ggml_fp16_t) + sizeof(uint32_t) + QK5_0 / 2, "wrong q5_0 block size/padding");
  57. #define QK5_1 32
  58. #define QR5_1 2
  59. typedef struct {
  60. half d; // delta
  61. half m; // min
  62. uint8_t qh[4]; // 5-th bit of quants
  63. uint8_t qs[QK5_1 / 2]; // nibbles / quants
  64. } block_q5_1;
  65. static_assert(sizeof(block_q5_1) == 2 * sizeof(ggml_fp16_t) + sizeof(uint32_t) + QK5_1 / 2, "wrong q5_1 block size/padding");
  66. #define QK8_0 32
  67. #define QR8_0 1
  68. typedef struct {
  69. half d; // delta
  70. int8_t qs[QK8_0]; // quants
  71. } block_q8_0;
  72. static_assert(sizeof(block_q8_0) == sizeof(ggml_fp16_t) + QK8_0, "wrong q8_0 block size/padding");
  73. #define WARP_SIZE 32
  74. #define CUDA_MUL_BLOCK_SIZE 256
  75. #define CUDA_DEQUANTIZE_BLOCK_SIZE 256
  76. // dmmv = dequantize_mul_mat_vec
  77. #ifndef GGML_CUDA_DMMV_X
  78. #define GGML_CUDA_DMMV_X 32
  79. #endif
  80. #ifndef GGML_CUDA_DMMV_Y
  81. #define GGML_CUDA_DMMV_Y 1
  82. #endif
  83. static __global__ void mul_f32(const float * x, const float * y, float * dst, const int kx, const int ky) {
  84. const int i = blockDim.x*blockIdx.x + threadIdx.x;
  85. if (i >= kx) {
  86. return;
  87. }
  88. dst[i] = x[i] * y[i%ky];
  89. }
  90. static __device__ void dequantize_q4_0(const void * vx, const int ib, const int iqs, float & v0, float & v1){
  91. const block_q4_0 * x = (const block_q4_0 *) vx;
  92. const float d = x[ib].d;
  93. const uint8_t vui = x[ib].qs[iqs];
  94. const int8_t vi0 = vui & 0xF;
  95. const int8_t vi1 = vui >> 4;
  96. v0 = (vi0 - 8)*d;
  97. v1 = (vi1 - 8)*d;
  98. }
  99. static __device__ void dequantize_q4_1(const void * vx, const int ib, const int iqs, float & v0, float & v1){
  100. const block_q4_1 * x = (const block_q4_1 *) vx;
  101. const float d = x[ib].d;
  102. const float m = x[ib].m;
  103. const uint8_t vui = x[ib].qs[iqs];
  104. const int8_t vi0 = vui & 0xF;
  105. const int8_t vi1 = vui >> 4;
  106. v0 = vi0*d + m;
  107. v1 = vi1*d + m;
  108. }
  109. static __device__ void dequantize_q5_0(const void * vx, const int ib, const int iqs, float & v0, float & v1){
  110. const block_q5_0 * x = (const block_q5_0 *) vx;
  111. const float d = x[ib].d;
  112. uint32_t qh;
  113. memcpy(&qh, x[ib].qh, sizeof(qh));
  114. const uint8_t xh_0 = ((qh >> (iqs + 0)) << 4) & 0x10;
  115. const uint8_t xh_1 = ((qh >> (iqs + 12)) ) & 0x10;
  116. const int32_t x0 = ((x[ib].qs[iqs] & 0xf) | xh_0) - 16;
  117. const int32_t x1 = ((x[ib].qs[iqs] >> 4) | xh_1) - 16;
  118. v0 = x0*d;
  119. v1 = x1*d;
  120. }
  121. static __device__ void dequantize_q5_1(const void * vx, const int ib, const int iqs, float & v0, float & v1){
  122. const block_q5_1 * x = (const block_q5_1 *) vx;
  123. const float d = x[ib].d;
  124. const float m = x[ib].m;
  125. uint32_t qh;
  126. memcpy(&qh, x[ib].qh, sizeof(qh));
  127. const uint8_t xh_0 = ((qh >> (iqs + 0)) << 4) & 0x10;
  128. const uint8_t xh_1 = ((qh >> (iqs + 12)) ) & 0x10;
  129. const int32_t x0 = ((x[ib].qs[iqs] & 0xf) | xh_0);
  130. const int32_t x1 = ((x[ib].qs[iqs] >> 4) | xh_1);
  131. v0 = x0*d + m;
  132. v1 = x1*d + m;
  133. }
  134. static __device__ void dequantize_q8_0(const void * vx, const int ib, const int iqs, float & v0, float & v1){
  135. const block_q8_0 * x = (const block_q8_0 *) vx;
  136. const float d = x[ib].d;
  137. const int8_t vi0 = x[ib].qs[iqs + 0];
  138. const int8_t vi1 = x[ib].qs[iqs + 1];
  139. v0 = vi0*d;
  140. v1 = vi1*d;
  141. }
  142. static __device__ void convert_f16(const void * vx, const int ib, const int iqs, float & v0, float & v1){
  143. const half * x = (const half *) vx;
  144. v0 = __half2float(x[ib + 0]);
  145. v1 = __half2float(x[ib + 1]);
  146. }
  147. template <int qk, int qr, dequantize_kernel_t dequantize_kernel>
  148. static __global__ void dequantize_block(const void * vx, float * y, const int k) {
  149. const int i = blockDim.x*blockIdx.x + 2*threadIdx.x;
  150. if (i >= k) {
  151. return;
  152. }
  153. const int ib = i/qk; // block index
  154. const int iqs = (i%qk)/qr; // quant index
  155. const int iybs = i - i%qk; // y block start index
  156. const int y_offset = qr == 1 ? 1 : qk/2;
  157. // dequantize
  158. float & v0 = y[iybs + iqs + 0];
  159. float & v1 = y[iybs + iqs + y_offset];
  160. dequantize_kernel(vx, ib, iqs, v0, v1);
  161. }
  162. template <int qk, int qr, dequantize_kernel_t dequantize_kernel>
  163. static __global__ void dequantize_mul_mat_vec(const void * vx, const float * y, float * dst, const int ncols) {
  164. // qk = quantized weights per x block
  165. // qr = number of quantized weights per data value in x block
  166. const int row = blockIdx.x*blockDim.y + threadIdx.y;
  167. const int tid = threadIdx.x;
  168. const int iter_stride = 2*GGML_CUDA_DMMV_X;
  169. const int vals_per_iter = iter_stride / WARP_SIZE; // num quantized vals per thread and i iter
  170. const int y_offset = qr == 1 ? 1 : qk/2;
  171. float tmp = 0; // partial sum for thread in warp
  172. for (int i = 0; i < ncols; i += iter_stride) {
  173. const int col = i + vals_per_iter*tid;
  174. const int ib = (row*ncols + col)/qk; // x block index
  175. const int iqs = (col%qk)/qr; // x quant index
  176. const int iybs = col - col%qk; // y block start index
  177. // processing >2 values per i iter is faster for fast GPUs
  178. #pragma unroll
  179. for (int j = 0; j < vals_per_iter; j += 2) {
  180. // process 2 vals per j iter
  181. // dequantize
  182. float v0, v1;
  183. dequantize_kernel(vx, ib, iqs + j/qr, v0, v1);
  184. // for qr = 2 the iqs needs to increase by 1 per j iter because 2 weights per data val
  185. // matrix multiplication
  186. tmp += v0 * y[iybs + iqs + j/qr + 0];
  187. tmp += v1 * y[iybs + iqs + j/qr + y_offset];
  188. // for qr = 2 the y index needs to increase by 1 per j iter because of y_offset = qk/2
  189. }
  190. }
  191. // sum up partial sums and write back result
  192. __syncthreads();
  193. #pragma unroll
  194. for (int mask = 16; mask > 0; mask >>= 1) {
  195. tmp += __shfl_xor_sync(0xffffffff, tmp, mask, 32);
  196. }
  197. if (tid == 0) {
  198. dst[row] = tmp;
  199. }
  200. }
  201. static void mul_f32_cuda(const float * x, const float * y, float * dst, const int kx, const int ky, cudaStream_t stream) {
  202. const int num_blocks = (kx + CUDA_MUL_BLOCK_SIZE - 1) / CUDA_MUL_BLOCK_SIZE;
  203. mul_f32<<<num_blocks, CUDA_MUL_BLOCK_SIZE, 0, stream>>>(x, y, dst, kx, ky);
  204. }
  205. static void dequantize_row_q4_0_cuda(const void * vx, float * y, const int k, cudaStream_t stream) {
  206. const int num_blocks = (k + CUDA_DEQUANTIZE_BLOCK_SIZE - 1) / CUDA_DEQUANTIZE_BLOCK_SIZE;
  207. dequantize_block<QK4_0, QR4_0, dequantize_q4_0><<<num_blocks, CUDA_DEQUANTIZE_BLOCK_SIZE, 0, stream>>>(vx, y, k);
  208. }
  209. static void dequantize_row_q4_1_cuda(const void * vx, float * y, const int k, cudaStream_t stream) {
  210. const int num_blocks = (k + CUDA_DEQUANTIZE_BLOCK_SIZE - 1) / CUDA_DEQUANTIZE_BLOCK_SIZE;
  211. dequantize_block<QK4_1, QR4_1, dequantize_q4_1><<<num_blocks, CUDA_DEQUANTIZE_BLOCK_SIZE, 0, stream>>>(vx, y, k);
  212. }
  213. static void dequantize_row_q5_0_cuda(const void * vx, float * y, const int k, cudaStream_t stream) {
  214. const int num_blocks = (k + CUDA_DEQUANTIZE_BLOCK_SIZE - 1) / CUDA_DEQUANTIZE_BLOCK_SIZE;
  215. dequantize_block<QK5_0, QR5_0, dequantize_q5_0><<<num_blocks, CUDA_DEQUANTIZE_BLOCK_SIZE, 0, stream>>>(vx, y, k);
  216. }
  217. static void dequantize_row_q5_1_cuda(const void * vx, float * y, const int k, cudaStream_t stream) {
  218. const int num_blocks = (k + CUDA_DEQUANTIZE_BLOCK_SIZE - 1) / CUDA_DEQUANTIZE_BLOCK_SIZE;
  219. dequantize_block<QK5_1, QR5_1, dequantize_q5_1><<<num_blocks, CUDA_DEQUANTIZE_BLOCK_SIZE, 0, stream>>>(vx, y, k);
  220. }
  221. static void dequantize_row_q8_0_cuda(const void * vx, float * y, const int k, cudaStream_t stream) {
  222. const int num_blocks = (k + CUDA_DEQUANTIZE_BLOCK_SIZE - 1) / CUDA_DEQUANTIZE_BLOCK_SIZE;
  223. dequantize_block<QK8_0, QR8_0, dequantize_q8_0><<<num_blocks, CUDA_DEQUANTIZE_BLOCK_SIZE, 0, stream>>>(vx, y, k);
  224. }
  225. static void dequantize_mul_mat_vec_q4_0_cuda(const void * vx, const float * y, float * dst, const int ncols, const int nrows, cudaStream_t stream) {
  226. GGML_ASSERT(ncols % GGML_CUDA_DMMV_X == 0);
  227. GGML_ASSERT(nrows % GGML_CUDA_DMMV_Y == 0);
  228. const dim3 block_dims(WARP_SIZE, GGML_CUDA_DMMV_Y, 1);
  229. dequantize_mul_mat_vec<QK4_0, QR4_0, dequantize_q4_0>
  230. <<<nrows/GGML_CUDA_DMMV_Y, block_dims, 0, stream>>>(vx, y, dst, ncols);
  231. }
  232. static void dequantize_mul_mat_vec_q4_1_cuda(const void * vx, const float * y, float * dst, const int ncols, const int nrows, cudaStream_t stream) {
  233. GGML_ASSERT(ncols % GGML_CUDA_DMMV_X == 0);
  234. GGML_ASSERT(nrows % GGML_CUDA_DMMV_Y == 0);
  235. const dim3 block_dims(WARP_SIZE, GGML_CUDA_DMMV_Y, 1);
  236. dequantize_mul_mat_vec<QK4_1, QR4_1, dequantize_q4_1>
  237. <<<nrows/GGML_CUDA_DMMV_Y, block_dims, 0, stream>>>(vx, y, dst, ncols);
  238. }
  239. static void dequantize_mul_mat_vec_q5_0_cuda(const void * vx, const float * y, float * dst, const int ncols, const int nrows, cudaStream_t stream) {
  240. GGML_ASSERT(ncols % GGML_CUDA_DMMV_X == 0);
  241. GGML_ASSERT(nrows % GGML_CUDA_DMMV_Y == 0);
  242. const dim3 block_dims(WARP_SIZE, GGML_CUDA_DMMV_Y, 1);
  243. dequantize_mul_mat_vec<QK5_0, QR5_0, dequantize_q5_0>
  244. <<<nrows/GGML_CUDA_DMMV_Y, block_dims, 0, stream>>>(vx, y, dst, ncols);
  245. }
  246. static void dequantize_mul_mat_vec_q5_1_cuda(const void * vx, const float * y, float * dst, const int ncols, const int nrows, cudaStream_t stream) {
  247. GGML_ASSERT(ncols % GGML_CUDA_DMMV_X == 0);
  248. GGML_ASSERT(nrows % GGML_CUDA_DMMV_Y == 0);
  249. const dim3 block_dims(WARP_SIZE, GGML_CUDA_DMMV_Y, 1);
  250. dequantize_mul_mat_vec<QK5_1, QR5_1, dequantize_q5_1>
  251. <<<nrows/GGML_CUDA_DMMV_Y, block_dims, 0, stream>>>(vx, y, dst, ncols);
  252. }
  253. static void dequantize_mul_mat_vec_q8_0_cuda(const void * vx, const float * y, float * dst, const int ncols, const int nrows, cudaStream_t stream) {
  254. GGML_ASSERT(ncols % GGML_CUDA_DMMV_X == 0);
  255. GGML_ASSERT(nrows % GGML_CUDA_DMMV_Y == 0);
  256. const dim3 block_dims(WARP_SIZE, GGML_CUDA_DMMV_Y, 1);
  257. dequantize_mul_mat_vec<QK8_0, QR8_0, dequantize_q8_0>
  258. <<<nrows/GGML_CUDA_DMMV_Y, block_dims, 0, stream>>>(vx, y, dst, ncols);
  259. }
  260. static void convert_fp16_to_fp32_cuda(const void * vx, float * y, const int k, cudaStream_t stream) {
  261. const int num_blocks = (k + CUDA_DEQUANTIZE_BLOCK_SIZE - 1) / CUDA_DEQUANTIZE_BLOCK_SIZE;
  262. dequantize_block<32, 1, convert_f16><<<num_blocks, CUDA_DEQUANTIZE_BLOCK_SIZE, 0, stream>>>(vx, y, k);
  263. }
  264. static void convert_mul_mat_vec_f16_cuda(const void * vx, const float * y, float * dst, const int ncols, const int nrows, cudaStream_t stream) {
  265. GGML_ASSERT(ncols % GGML_CUDA_DMMV_X == 0);
  266. GGML_ASSERT(nrows % GGML_CUDA_DMMV_Y == 0);
  267. const dim3 block_dims(WARP_SIZE, GGML_CUDA_DMMV_Y, 1);
  268. dequantize_mul_mat_vec<1, 1, convert_f16>
  269. <<<nrows/GGML_CUDA_DMMV_Y, block_dims, 0, stream>>>(vx, y, dst, ncols);
  270. }
  271. static to_fp32_cuda_t ggml_get_to_fp32_cuda(ggml_type type) {
  272. switch (type) {
  273. case GGML_TYPE_Q4_0:
  274. return dequantize_row_q4_0_cuda;
  275. case GGML_TYPE_Q4_1:
  276. return dequantize_row_q4_1_cuda;
  277. case GGML_TYPE_Q5_0:
  278. return dequantize_row_q5_0_cuda;
  279. case GGML_TYPE_Q5_1:
  280. return dequantize_row_q5_1_cuda;
  281. case GGML_TYPE_Q8_0:
  282. return dequantize_row_q8_0_cuda;
  283. case GGML_TYPE_F16:
  284. return convert_fp16_to_fp32_cuda;
  285. default:
  286. return nullptr;
  287. }
  288. }
  289. static dequantize_mul_mat_vec_cuda_t ggml_get_dequantize_mul_mat_vec_cuda(ggml_type type) {
  290. switch (type) {
  291. case GGML_TYPE_Q4_0:
  292. return dequantize_mul_mat_vec_q4_0_cuda;
  293. case GGML_TYPE_Q4_1:
  294. return dequantize_mul_mat_vec_q4_1_cuda;
  295. case GGML_TYPE_Q5_0:
  296. return dequantize_mul_mat_vec_q5_0_cuda;
  297. case GGML_TYPE_Q5_1:
  298. return dequantize_mul_mat_vec_q5_1_cuda;
  299. case GGML_TYPE_Q8_0:
  300. return dequantize_mul_mat_vec_q8_0_cuda;
  301. case GGML_TYPE_F16:
  302. return convert_mul_mat_vec_f16_cuda;
  303. default:
  304. return nullptr;
  305. }
  306. }
  307. // buffer pool for cuda
  308. #define MAX_CUDA_BUFFERS 256
  309. struct scoped_spin_lock {
  310. std::atomic_flag& lock;
  311. scoped_spin_lock(std::atomic_flag& lock) : lock(lock) {
  312. while (lock.test_and_set(std::memory_order_acquire)) {
  313. ; // spin
  314. }
  315. }
  316. ~scoped_spin_lock() {
  317. lock.clear(std::memory_order_release);
  318. }
  319. scoped_spin_lock(const scoped_spin_lock&) = delete;
  320. scoped_spin_lock& operator=(const scoped_spin_lock&) = delete;
  321. };
  322. struct cuda_buffer {
  323. void * ptr = nullptr;
  324. size_t size = 0;
  325. };
  326. static cuda_buffer g_cuda_buffer_pool[MAX_CUDA_BUFFERS];
  327. static std::atomic_flag g_cuda_pool_lock = ATOMIC_FLAG_INIT;
  328. static void * ggml_cuda_pool_malloc(size_t size, size_t * actual_size) {
  329. scoped_spin_lock lock(g_cuda_pool_lock);
  330. for (int i = 0; i < MAX_CUDA_BUFFERS; ++i) {
  331. cuda_buffer& b = g_cuda_buffer_pool[i];
  332. if (b.size >= size && b.ptr != nullptr) {
  333. void * ptr = b.ptr;
  334. *actual_size = b.size;
  335. b.ptr = nullptr;
  336. b.size = 0;
  337. return ptr;
  338. }
  339. }
  340. void * ptr;
  341. CUDA_CHECK(cudaMalloc((void **) &ptr, size));
  342. *actual_size = size;
  343. return ptr;
  344. }
  345. static void ggml_cuda_pool_free(void * ptr, size_t size) {
  346. scoped_spin_lock lock(g_cuda_pool_lock);
  347. for (int i = 0; i < MAX_CUDA_BUFFERS; ++i) {
  348. cuda_buffer& b = g_cuda_buffer_pool[i];
  349. if (b.ptr == nullptr) {
  350. b.ptr = ptr;
  351. b.size = size;
  352. return;
  353. }
  354. }
  355. fprintf(stderr, "WARNING: cuda buffer pool full, increase MAX_CUDA_BUFFERS\n");
  356. CUDA_CHECK(cudaFree(ptr));
  357. }
  358. #define GGML_CUDA_MAX_STREAMS 8 // Set this to 1 for reproducible matrix multiplication.
  359. #define GGML_CUDA_MAX_EVENTS 64
  360. static cublasHandle_t g_cublasH = nullptr;
  361. static cudaStream_t g_cudaStreams[GGML_CUDA_MAX_STREAMS] = { nullptr };
  362. static cudaStream_t g_cudaStreams2[GGML_CUDA_MAX_STREAMS] = { nullptr };
  363. static cudaEvent_t g_cudaEvents[GGML_CUDA_MAX_EVENTS] = { nullptr };
  364. void ggml_init_cublas() {
  365. if (g_cublasH == nullptr) {
  366. // create streams
  367. for (int i = 0; i < GGML_CUDA_MAX_STREAMS; ++i) {
  368. CUDA_CHECK(cudaStreamCreateWithFlags(&g_cudaStreams[i], cudaStreamNonBlocking));
  369. CUDA_CHECK(cudaStreamCreateWithFlags(&g_cudaStreams2[i], cudaStreamNonBlocking));
  370. }
  371. // create events
  372. for (int i = 0; i < GGML_CUDA_MAX_EVENTS; ++i) {
  373. CUDA_CHECK(cudaEventCreateWithFlags(&g_cudaEvents[i], cudaEventDisableTiming));
  374. }
  375. // create cublas handle
  376. CUBLAS_CHECK(cublasCreate(&g_cublasH));
  377. CUBLAS_CHECK(cublasSetMathMode(g_cublasH, CUBLAS_TF32_TENSOR_OP_MATH));
  378. // configure logging to stdout
  379. // CUBLAS_CHECK(cublasLoggerConfigure(1, 1, 0, nullptr));
  380. }
  381. }
  382. void * ggml_cuda_host_malloc(size_t size) {
  383. if (getenv("GGML_CUDA_NO_PINNED") != nullptr) {
  384. return nullptr;
  385. }
  386. void * ptr = nullptr;
  387. cudaError_t err = cudaMallocHost((void **) &ptr, size);
  388. if (err != cudaSuccess) {
  389. fprintf(stderr, "WARNING: failed to allocate %.2f MB of pinned memory: %s\n",
  390. size/1024.0/1024.0, cudaGetErrorString(err));
  391. return nullptr;
  392. }
  393. return ptr;
  394. }
  395. void ggml_cuda_host_free(void * ptr) {
  396. CUDA_CHECK(cudaFreeHost(ptr));
  397. }
  398. static cudaError_t ggml_cuda_h2d_tensor_2d(void * dst, const struct ggml_tensor * src, uint64_t i3, uint64_t i2, cudaStream_t stream) {
  399. const uint64_t ne0 = src->ne[0];
  400. const uint64_t ne1 = src->ne[1];
  401. const uint64_t nb0 = src->nb[0];
  402. const uint64_t nb1 = src->nb[1];
  403. const uint64_t nb2 = src->nb[2];
  404. const uint64_t nb3 = src->nb[3];
  405. const enum ggml_type type = src->type;
  406. const size_t ts = ggml_type_size(type);
  407. const size_t bs = ggml_blck_size(type);
  408. const void * x = (const void *) ((const char *) src->data + i2*nb2 + i3*nb3);
  409. if (nb0 == ts && nb1 == ts*ne0/bs) {
  410. return cudaMemcpyAsync(dst, x, ne1*nb1, cudaMemcpyHostToDevice, stream);
  411. } else if (nb0 == ts) {
  412. return cudaMemcpy2DAsync(dst, ts*ne0/bs, x, nb1, ts*ne0/bs, ne1, cudaMemcpyHostToDevice, stream);
  413. } else {
  414. for (uint64_t i1 = 0; i1 < ne1; i1++) {
  415. const void * rx = (const void *) ((const char *) x + i1*nb1);
  416. void * rd = (void *) ((char *) dst + i1*ts*ne0/bs);
  417. // pretend the row is a matrix with cols=1
  418. cudaError_t r = cudaMemcpy2DAsync(rd, ts/bs, rx, nb0, ts/bs, ne0, cudaMemcpyHostToDevice, stream);
  419. if (r != cudaSuccess) return r;
  420. }
  421. return cudaSuccess;
  422. }
  423. }
  424. static void ggml_cuda_mul_f32(const ggml_tensor * src0, const ggml_tensor * src1, ggml_tensor * dst) {
  425. GGML_ASSERT(src1->backend == GGML_BACKEND_CUDA);
  426. const int64_t ne00 = src0->ne[0];
  427. const int64_t ne01 = src0->ne[1];
  428. const int64_t ne02 = src0->ne[2];
  429. const int64_t ne03 = src0->ne[2];
  430. const int64_t ne0 = ne00 * ne01 * ne02 * ne03;
  431. const int64_t ne10 = src1->ne[0];
  432. const int64_t ne11 = src1->ne[1];
  433. const int64_t ne12 = src1->ne[2];
  434. const int64_t ne13 = src1->ne[3];
  435. const int nb2 = dst->nb[2];
  436. const int nb3 = dst->nb[3];
  437. size_t x_size, d_size;
  438. float * d_X = (float *) ggml_cuda_pool_malloc(ne0 * sizeof(float), &x_size); // src0
  439. float * d_Y = (float *) src1->data; // src1 is already on device, broadcasted.
  440. float * d_D = (float *) ggml_cuda_pool_malloc(ne0 * sizeof(float), &d_size); // dst
  441. for (int64_t i03 = 0; i03 < ne03; i03++) {
  442. for (int64_t i02 = 0; i02 < ne02; i02++) {
  443. const int i0 = i03*ne02 + i02;
  444. float * c_X2 = d_X + i0*ne01*ne00;
  445. float * c_D2 = d_D + i0*ne01*ne00;
  446. cudaStream_t cudaStream = g_cudaStreams[i0 % GGML_CUDA_MAX_STREAMS];
  447. cudaStream_t cudaStream2 = g_cudaStreams2[i0 % GGML_CUDA_MAX_STREAMS];
  448. cudaEvent_t cudaEvent = g_cudaEvents[i0 % GGML_CUDA_MAX_EVENTS];
  449. // copy src0 to device
  450. CUDA_CHECK(ggml_cuda_h2d_tensor_2d(c_X2, src0, i03, i02, cudaStream2));
  451. CUDA_CHECK(cudaEventRecord(cudaEvent, cudaStream2));
  452. // wait for data
  453. CUDA_CHECK(cudaStreamWaitEvent(cudaStream, cudaEvent, 0));
  454. for (int64_t i01 = 0; i01 < ne01; i01++) {
  455. const int64_t i13 = i03%ne13;
  456. const int64_t i12 = i02%ne12;
  457. const int64_t i11 = i01%ne11;
  458. const int i1 = i13*ne12*ne11 + i12*ne11 + i11;
  459. float * c_X1 = c_X2 + i01*ne00;
  460. float * c_Y = d_Y + i1*ne10;
  461. float * c_D1 = c_D2 + i01*ne00;
  462. // compute
  463. mul_f32_cuda(c_X1, c_Y, c_D1, ne00, ne10, cudaStream);
  464. CUDA_CHECK(cudaGetLastError());
  465. }
  466. // copy dst to host
  467. float * d = (float *) ((char *) dst->data + i02*nb2 + i03*nb3);
  468. CUDA_CHECK(cudaMemcpyAsync(d, c_D2, sizeof(float)*ne00*ne01, cudaMemcpyDeviceToHost, cudaStream));
  469. }
  470. }
  471. CUDA_CHECK(cudaDeviceSynchronize());
  472. ggml_cuda_pool_free(d_X, x_size);
  473. ggml_cuda_pool_free(d_D, d_size);
  474. }
  475. static void ggml_cuda_mul_mat_f32(const ggml_tensor * src0, const ggml_tensor * src1, ggml_tensor * dst) {
  476. const int64_t ne00 = src0->ne[0];
  477. const int64_t ne01 = src0->ne[1];
  478. const int64_t ne02 = src0->ne[2];
  479. const int64_t ne03 = src0->ne[3];
  480. const int64_t ne10 = src1->ne[0];
  481. const int64_t ne11 = src1->ne[1];
  482. const int nb2 = dst->nb[2];
  483. const int nb3 = dst->nb[3];
  484. const float alpha = 1.0f;
  485. const float beta = 0.0f;
  486. const int x_ne = ne01 * ne00;
  487. const int y_ne = ne11 * ne10;
  488. const int d_ne = ne11 * ne01;
  489. const int n_mm = ne03 * ne02;
  490. size_t x_size, y_size, d_size;
  491. float * d_X = (float *) ggml_cuda_pool_malloc(n_mm * sizeof(float) * x_ne, &x_size);
  492. float * d_Y = (float *) ggml_cuda_pool_malloc(n_mm * sizeof(float) * y_ne, &y_size);
  493. float * d_D = (float *) ggml_cuda_pool_malloc(n_mm * sizeof(float) * d_ne, &d_size);
  494. for (int64_t i03 = 0; i03 < ne03; i03++) {
  495. for (int64_t i02 = 0; i02 < ne02; i02++) {
  496. int i = i03*ne02 + i02;
  497. cudaStream_t cudaStream = g_cudaStreams[i % GGML_CUDA_MAX_STREAMS];
  498. float * c_X = d_X + i * x_ne;
  499. float * c_Y = d_Y + i * y_ne;
  500. float * c_D = d_D + i * d_ne;
  501. // copy data to device
  502. CUDA_CHECK(ggml_cuda_h2d_tensor_2d(c_X, src0, i03, i02, cudaStream));
  503. CUDA_CHECK(ggml_cuda_h2d_tensor_2d(c_Y, src1, i03, i02, cudaStream));
  504. // compute
  505. CUBLAS_CHECK(cublasSetStream(g_cublasH, cudaStream));
  506. CUBLAS_CHECK(
  507. cublasSgemm(g_cublasH, CUBLAS_OP_T, CUBLAS_OP_N,
  508. ne01, ne11, ne10,
  509. &alpha, c_X, ne00,
  510. c_Y, ne10,
  511. &beta, c_D, ne01));
  512. // copy dst to host
  513. float * d = (float *) ((char *) dst->data + i02*nb2 + i03*nb3);
  514. CUDA_CHECK(cudaMemcpyAsync(d, c_D, sizeof(float) * d_ne, cudaMemcpyDeviceToHost, cudaStream));
  515. }
  516. }
  517. CUDA_CHECK(cudaDeviceSynchronize());
  518. ggml_cuda_pool_free(d_X, x_size);
  519. ggml_cuda_pool_free(d_Y, y_size);
  520. ggml_cuda_pool_free(d_D, d_size);
  521. }
  522. static void ggml_cuda_mul_mat_f16(const ggml_tensor * src0, const ggml_tensor * src1, ggml_tensor * dst, void * wdata, size_t /* wsize */) {
  523. const int64_t ne00 = src0->ne[0];
  524. const int64_t ne01 = src0->ne[1];
  525. const int64_t ne02 = src0->ne[2];
  526. const int64_t ne03 = src0->ne[3];
  527. const int64_t ne10 = src1->ne[0];
  528. const int64_t ne11 = src1->ne[1];
  529. const int nb10 = src1->nb[0];
  530. const int nb11 = src1->nb[1];
  531. const int nb12 = src1->nb[2];
  532. const int nb13 = src1->nb[3];
  533. const int nb2 = dst->nb[2];
  534. const int nb3 = dst->nb[3];
  535. const float alpha = 1.0f;
  536. const float beta = 0.0f;
  537. const int x_ne = ne01 * ne00;
  538. const int y_ne = ne11 * ne10;
  539. const int d_ne = ne11 * ne01;
  540. const int n_mm = ne03 * ne02;
  541. size_t x_size, y_size, d_size;
  542. half * d_X = (half *) ggml_cuda_pool_malloc(n_mm * sizeof(half) * x_ne, &x_size);
  543. half * d_Y = (half *) ggml_cuda_pool_malloc(n_mm * sizeof(half) * y_ne, &y_size);
  544. float * d_D = (float *) ggml_cuda_pool_malloc(n_mm * sizeof(float) * d_ne, &d_size);
  545. bool src1_cont_rows = nb10 == sizeof(float);
  546. bool src1_cont_cols = (size_t)nb11 == ne11*sizeof(float);
  547. for (int64_t i03 = 0; i03 < ne03; i03++) {
  548. for (int64_t i02 = 0; i02 < ne02; i02++) {
  549. int i = i03*ne02 + i02;
  550. cudaStream_t cudaStream = g_cudaStreams[i % GGML_CUDA_MAX_STREAMS];
  551. half * c_X = d_X + i * x_ne;
  552. half * c_Y = d_Y + i * y_ne;
  553. float * c_D = d_D + i * d_ne;
  554. // copy src0 to device
  555. CUDA_CHECK(ggml_cuda_h2d_tensor_2d(c_X, src0, i03, i02, cudaStream));
  556. // convert src1 to fp16
  557. // TODO: use multiple threads
  558. ggml_fp16_t * const tmp = (ggml_fp16_t *) wdata + (ne11 * ne10) * (i03 * ne02 + i02);
  559. char * src1i = (char *) src1->data + i03*nb13 + i02*nb12;
  560. if (src1_cont_rows) {
  561. if (src1_cont_cols) {
  562. ggml_fp32_to_fp16_row((float *) src1i, tmp, ne10*ne11);
  563. }
  564. else {
  565. for (int64_t i01 = 0; i01 < ne11; i01++) {
  566. ggml_fp32_to_fp16_row((float *) (src1i + i01*nb11), tmp + i01*ne10, ne10);
  567. }
  568. }
  569. }
  570. else {
  571. for (int64_t i01 = 0; i01 < ne11; i01++) {
  572. for (int64_t i00 = 0; i00 < ne10; i00++) {
  573. // very slow due to no inlining
  574. tmp[i01*ne10 + i00] = ggml_fp32_to_fp16(*(float *) (src1i + i01*nb11 + i00*nb10));
  575. }
  576. }
  577. }
  578. // copy src1 to device
  579. CUDA_CHECK(cudaMemcpyAsync(c_Y, tmp, sizeof(half) * y_ne, cudaMemcpyHostToDevice, cudaStream));
  580. // compute
  581. CUBLAS_CHECK(cublasSetStream(g_cublasH, cudaStream));
  582. CUBLAS_CHECK(
  583. cublasGemmEx(g_cublasH, CUBLAS_OP_T, CUBLAS_OP_N,
  584. ne01, ne11, ne10,
  585. &alpha, c_X, CUDA_R_16F, ne00,
  586. c_Y, CUDA_R_16F, ne10,
  587. &beta, c_D, CUDA_R_32F, ne01,
  588. CUBLAS_COMPUTE_32F_FAST_16F,
  589. CUBLAS_GEMM_DEFAULT));
  590. // copy dst to host
  591. float * d = (float *) ((char *) dst->data + i02*nb2 + i03*nb3);
  592. CUDA_CHECK(cudaMemcpyAsync(d, c_D, sizeof(float) * d_ne, cudaMemcpyDeviceToHost, cudaStream));
  593. }
  594. }
  595. CUDA_CHECK(cudaDeviceSynchronize());
  596. ggml_cuda_pool_free(d_X, x_size);
  597. ggml_cuda_pool_free(d_Y, y_size);
  598. ggml_cuda_pool_free(d_D, d_size);
  599. }
  600. static void ggml_cuda_mul_mat_q_f32(const ggml_tensor * src0, const ggml_tensor * src1, ggml_tensor * dst) {
  601. const int64_t ne00 = src0->ne[0];
  602. const int64_t ne01 = src0->ne[1];
  603. const int64_t ne02 = src0->ne[2];
  604. const int64_t ne03 = src0->ne[3];
  605. const int64_t ne10 = src1->ne[0];
  606. const int64_t ne11 = src1->ne[1];
  607. const int nb2 = dst->nb[2];
  608. const int nb3 = dst->nb[3];
  609. const ggml_type type = src0->type;
  610. const bool mul_mat_vec = ne11 == 1;
  611. const float alpha = 1.0f;
  612. const float beta = 0.0f;
  613. const int x_ne = ne01 * ne00;
  614. const int y_ne = ne11 * ne10;
  615. const int d_ne = ne11 * ne01;
  616. const int n_mm = ne03 * ne02;
  617. const size_t q_sz = ggml_type_size(type) * x_ne / ggml_blck_size(type);
  618. size_t x_size, y_size, d_size, q_size;
  619. float * d_X = nullptr;
  620. if (!mul_mat_vec) {
  621. d_X = (float *) ggml_cuda_pool_malloc(n_mm * sizeof(float) * x_ne, &x_size);
  622. }
  623. float * d_Y = (float *) ggml_cuda_pool_malloc(n_mm * sizeof(float) * y_ne, &y_size);
  624. float * d_D = (float *) ggml_cuda_pool_malloc(n_mm * sizeof(float) * d_ne, &d_size);
  625. char * d_Q = (char *) ggml_cuda_pool_malloc(n_mm * q_sz, &q_size);
  626. const to_fp32_cuda_t to_fp32_cuda = ggml_get_to_fp32_cuda(type);
  627. dequantize_mul_mat_vec_cuda_t dmmv = ggml_get_dequantize_mul_mat_vec_cuda(type);
  628. GGML_ASSERT(to_fp32_cuda != nullptr);
  629. for (int64_t i03 = 0; i03 < ne03; i03++) {
  630. for (int64_t i02 = 0; i02 < ne02; i02++) {
  631. int i = i03*ne02 + i02;
  632. cudaStream_t cudaStream = g_cudaStreams[i % GGML_CUDA_MAX_STREAMS];
  633. cudaStream_t cudaStream2 = g_cudaStreams2[i % GGML_CUDA_MAX_STREAMS];
  634. cudaEvent_t cudaEvent = g_cudaEvents[i % GGML_CUDA_MAX_EVENTS];
  635. float * c_Y = d_Y + i * y_ne;
  636. float * c_D = d_D + i * d_ne;
  637. char * c_Q = d_Q + i * q_sz;
  638. // copy src0 to device if necessary
  639. if (src0->backend == GGML_BACKEND_CPU) {
  640. CUDA_CHECK(ggml_cuda_h2d_tensor_2d(c_Q, src0, i03, i02, cudaStream2));
  641. } else if (src0->backend == GGML_BACKEND_CUDA) {
  642. c_Q = ((char *) src0->data) + i * q_sz;
  643. } else {
  644. GGML_ASSERT(false);
  645. }
  646. if (mul_mat_vec) { // specialized dequantize_mul_mat_vec kernel
  647. CUDA_CHECK(cudaEventRecord(cudaEvent, cudaStream2));
  648. // copy src1 to device
  649. CUDA_CHECK(ggml_cuda_h2d_tensor_2d(c_Y, src1, i03, i02, cudaStream));
  650. // wait for data
  651. CUDA_CHECK(cudaStreamWaitEvent(cudaStream, cudaEvent, 0));
  652. // compute
  653. dmmv(c_Q, c_Y, c_D, ne00, ne01, cudaStream);
  654. CUDA_CHECK(cudaGetLastError());
  655. } else { // general dequantization kernel + cuBLAS matrix matrix multiplication
  656. float * c_X = d_X + i * x_ne;
  657. // convert src0 to fp32 on device
  658. to_fp32_cuda(c_Q, c_X, x_ne, cudaStream2);
  659. CUDA_CHECK(cudaGetLastError());
  660. CUDA_CHECK(cudaEventRecord(cudaEvent, cudaStream2));
  661. // copy src1 to device
  662. CUDA_CHECK(ggml_cuda_h2d_tensor_2d(c_Y, src1, i03, i02, cudaStream));
  663. // wait for conversion
  664. CUDA_CHECK(cudaStreamWaitEvent(cudaStream, cudaEvent, 0));
  665. // compute
  666. CUBLAS_CHECK(cublasSetStream(g_cublasH, cudaStream));
  667. CUBLAS_CHECK(
  668. cublasSgemm(g_cublasH, CUBLAS_OP_T, CUBLAS_OP_N,
  669. ne01, ne11, ne10,
  670. &alpha, c_X, ne00,
  671. c_Y, ne10,
  672. &beta, c_D, ne01));
  673. }
  674. // copy dst to host
  675. float * d = (float *) ((char *) dst->data + i02*nb2 + i03*nb3);
  676. CUDA_CHECK(cudaMemcpyAsync(d, c_D, sizeof(float) * d_ne, cudaMemcpyDeviceToHost, cudaStream));
  677. }
  678. }
  679. CUDA_CHECK(cudaDeviceSynchronize());
  680. if (!mul_mat_vec) {
  681. ggml_cuda_pool_free(d_X, x_size);
  682. }
  683. ggml_cuda_pool_free(d_Y, y_size);
  684. ggml_cuda_pool_free(d_D, d_size);
  685. ggml_cuda_pool_free(d_Q, q_size);
  686. }
  687. void ggml_cuda_mul(const struct ggml_tensor * src0, const struct ggml_tensor * src1, struct ggml_tensor * dst) {
  688. GGML_ASSERT(src0->type == GGML_TYPE_F32 && src1->type == GGML_TYPE_F32 && dst->type == GGML_TYPE_F32);
  689. ggml_cuda_mul_f32(src0, src1, dst);
  690. }
  691. bool ggml_cuda_can_mul_mat(const struct ggml_tensor * src0, const struct ggml_tensor * src1, struct ggml_tensor * dst) {
  692. const int64_t ne10 = src1->ne[0];
  693. const int64_t ne0 = dst->ne[0];
  694. const int64_t ne1 = dst->ne[1];
  695. // TODO: find the optimal values for these
  696. if ((src0->type == GGML_TYPE_F32 || src0->type == GGML_TYPE_F16 || ggml_is_quantized(src0->type)) &&
  697. src1->type == GGML_TYPE_F32 &&
  698. dst->type == GGML_TYPE_F32 &&
  699. ((ne0 >= 32 && ne1 >= 32 && ne10 >= 32) || src0->backend == GGML_BACKEND_CUDA)) {
  700. return true;
  701. }
  702. return false;
  703. }
  704. bool ggml_cuda_mul_mat_use_f16(const struct ggml_tensor * src0, const struct ggml_tensor * src1, struct ggml_tensor * /* dst */) {
  705. size_t src0_sz = ggml_nbytes(src0);
  706. size_t src1_sz = ggml_nbytes(src1);
  707. // mul_mat_q: src0 is converted to fp32 on device
  708. size_t mul_mat_q_transfer = src0_sz + src1_sz;
  709. // mul_mat_f16: src1 is converted to fp16 on cpu
  710. size_t mul_mat_f16_transfer = src0_sz + sizeof(half) * ggml_nelements(src1);
  711. // choose the smaller one to transfer to the device
  712. // TODO: this is not always the best choice due to the overhead of converting to fp16
  713. return mul_mat_f16_transfer < mul_mat_q_transfer;
  714. }
  715. void ggml_cuda_mul_mat(const ggml_tensor * src0, const ggml_tensor * src1, ggml_tensor * dst, void * wdata, size_t wsize) {
  716. GGML_ASSERT(ggml_cuda_can_mul_mat(src0, src1, dst));
  717. if (src0->type == GGML_TYPE_F32) {
  718. ggml_cuda_mul_mat_f32(src0, src1, dst);
  719. }
  720. else if (src0->type == GGML_TYPE_F16) {
  721. if (ggml_cuda_mul_mat_use_f16(src0, src1, dst)) {
  722. ggml_cuda_mul_mat_f16(src0, src1, dst, wdata, wsize);
  723. }
  724. else {
  725. ggml_cuda_mul_mat_q_f32(src0, src1, dst);
  726. }
  727. }
  728. else if (ggml_is_quantized(src0->type)) {
  729. ggml_cuda_mul_mat_q_f32(src0, src1, dst);
  730. }
  731. else {
  732. GGML_ASSERT(false);
  733. }
  734. }
  735. size_t ggml_cuda_mul_mat_get_wsize(const struct ggml_tensor * src0, const struct ggml_tensor * src1, struct ggml_tensor * dst) {
  736. if (ggml_cuda_mul_mat_use_f16(src0, src1, dst)) {
  737. return ggml_nelements(src1) * sizeof(ggml_fp16_t);
  738. }
  739. else {
  740. return 0;
  741. }
  742. }
  743. void ggml_cuda_transform_tensor(ggml_tensor * tensor) {
  744. const int64_t ne0 = tensor->ne[0];
  745. const int64_t ne1 = tensor->ne[1];
  746. const int64_t ne2 = tensor->ne[2];
  747. const int64_t ne3 = tensor->ne[3];
  748. const ggml_type type = tensor->type;
  749. const size_t q_sz = ggml_type_size(type) * ne0 * ne1 * ne2 * ne3 / ggml_blck_size(type);
  750. size_t q_size;
  751. char * dst = (char *) ggml_cuda_pool_malloc(q_sz, &q_size);
  752. cudaStream_t cudaStream2 = g_cudaStreams2[0];
  753. // copy tensor to device
  754. for (int64_t i3 = 0; i3 < ne3; i3++) {
  755. for (int64_t i2 = 0; i2 < ne2; i2++) {
  756. int i = i3*ne2 + i2;
  757. CUDA_CHECK(ggml_cuda_h2d_tensor_2d(dst + i*ne0*ne1, tensor, i3, i2, cudaStream2));
  758. }
  759. }
  760. tensor->data = dst;
  761. tensor->backend = GGML_BACKEND_CUDA;
  762. }
  763. void ggml_cuda_load_data(const char * fname, struct ggml_tensor * tensor, const size_t offset) {
  764. FILE * fp = fopen(fname, "rb");
  765. const size_t size = ggml_nbytes(tensor);
  766. void * buf;
  767. CUDA_CHECK(cudaMalloc(&buf, size));
  768. void * buf_host = malloc(size);
  769. #ifdef _WIN32
  770. int ret = _fseeki64(fp, (__int64) offset, SEEK_SET);
  771. #else
  772. int ret = fseek(fp, (long) offset, SEEK_SET);
  773. #endif
  774. GGML_ASSERT(ret == 0); // same
  775. size_t ret2 = fread(buf_host, size, 1, fp);
  776. if (ret2 != 1) {
  777. fprintf(stderr, "unexpectedly reached end of file");
  778. exit(1);
  779. }
  780. cudaMemcpy(buf, buf_host, size, cudaMemcpyHostToDevice);
  781. cudaDeviceSynchronize();
  782. tensor->data = buf;
  783. free(buf_host);
  784. fclose(fp);
  785. }