ggml-metal.metal 45 KB

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  1. #include <metal_stdlib>
  2. using namespace metal;
  3. #define MAX(x, y) ((x) > (y) ? (x) : (y))
  4. #define QK4_0 32
  5. #define QR4_0 2
  6. typedef struct {
  7. half d; // delta
  8. uint8_t qs[QK4_0 / 2]; // nibbles / quants
  9. } block_q4_0;
  10. #define QK4_1 32
  11. typedef struct {
  12. half d; // delta
  13. half m; // min
  14. uint8_t qs[QK4_1 / 2]; // nibbles / quants
  15. } block_q4_1;
  16. static void dequantize_row_q4_0(device const block_q4_0 * x, device float * y, int k) {
  17. const int qk = QK4_0;
  18. assert(k % qk == 0);
  19. const int nb = k / qk;
  20. for (int i = 0; i < nb; i++) {
  21. const half d = x[i].d;
  22. for (int j = 0; j < qk/2; ++j) {
  23. const int x0 = (x[i].qs[j] & 0x0F) - 8;
  24. const int x1 = (x[i].qs[j] >> 4) - 8;
  25. y[i*qk + j + 0 ] = x0*d;
  26. y[i*qk + j + qk/2] = x1*d;
  27. }
  28. }
  29. }
  30. static void dequantize_row_q4_1(device const block_q4_1 * x, device float * y, int k) {
  31. const int qk = QK4_1;
  32. assert(k % qk == 0);
  33. const int nb = k / qk;
  34. for (int i = 0; i < nb; i++) {
  35. const half d = x[i].d;
  36. const half m = x[i].m;
  37. for (int j = 0; j < qk/2; ++j) {
  38. const int x0 = (x[i].qs[j] & 0x0F);
  39. const int x1 = (x[i].qs[j] >> 4);
  40. y[i*qk + j + 0 ] = x0*d + m;
  41. y[i*qk + j + qk/2] = x1*d + m;
  42. }
  43. }
  44. }
  45. kernel void kernel_add(
  46. device const float * src0,
  47. device const float * src1,
  48. device float * dst,
  49. uint tpig[[thread_position_in_grid]]) {
  50. dst[tpig] = src0[tpig] + src1[tpig];
  51. }
  52. kernel void kernel_mul(
  53. device const float * src0,
  54. device const float * src1,
  55. device float * dst,
  56. uint tpig[[thread_position_in_grid]]) {
  57. dst[tpig] = src0[tpig] * src1[tpig];
  58. }
  59. // assumption: src1 is a row
  60. // broadcast src1 into src0
  61. kernel void kernel_mul_row(
  62. device const float * src0,
  63. device const float * src1,
  64. device float * dst,
  65. constant int64_t & ne00,
  66. uint tpig[[thread_position_in_grid]]) {
  67. dst[tpig] = src0[tpig] * src1[tpig % ne00];
  68. }
  69. kernel void kernel_scale(
  70. device const float * src0,
  71. device float * dst,
  72. constant float & scale,
  73. uint tpig[[thread_position_in_grid]]) {
  74. dst[tpig] = src0[tpig] * scale;
  75. }
  76. kernel void kernel_silu(
  77. device const float * src0,
  78. device float * dst,
  79. uint tpig[[thread_position_in_grid]]) {
  80. float x = src0[tpig];
  81. dst[tpig] = x / (1.0f + exp(-x));
  82. }
  83. kernel void kernel_relu(
  84. device const float * src0,
  85. device float * dst,
  86. uint tpig[[thread_position_in_grid]]) {
  87. dst[tpig] = max(0.0f, src0[tpig]);
  88. }
  89. constant float GELU_COEF_A = 0.044715f;
  90. constant float SQRT_2_OVER_PI = 0.79788456080286535587989211986876f;
  91. kernel void kernel_gelu(
  92. device const float * src0,
  93. device float * dst,
  94. uint tpig[[thread_position_in_grid]]) {
  95. float x = src0[tpig];
  96. dst[tpig] = 0.5f*x*(1.0f + tanh(SQRT_2_OVER_PI*x*(1.0f + GELU_COEF_A*x*x)));
  97. }
  98. kernel void kernel_soft_max(
  99. device const float * src0,
  100. device float * dst,
  101. constant int64_t & ne00,
  102. constant int64_t & ne01,
  103. constant int64_t & ne02,
  104. threadgroup float * buf [[threadgroup(0)]],
  105. uint3 tgpig[[threadgroup_position_in_grid]],
  106. uint3 tpitg[[thread_position_in_threadgroup]],
  107. uint3 ntg[[threads_per_threadgroup]]) {
  108. const int64_t i03 = tgpig[2];
  109. const int64_t i02 = tgpig[1];
  110. const int64_t i01 = tgpig[0];
  111. device const float * psrc0 = src0 + i03*ne02*ne01*ne00 + i02*ne01*ne00 + i01*ne00;
  112. device float * pdst = dst + i03*ne02*ne01*ne00 + i02*ne01*ne00 + i01*ne00;
  113. // parallel max
  114. buf[tpitg[0]] = -INFINITY;
  115. for (int i00 = tpitg[0]; i00 < ne00; i00 += ntg[0]) {
  116. buf[tpitg[0]] = MAX(buf[tpitg[0]], psrc0[i00]);
  117. }
  118. // reduce
  119. threadgroup_barrier(mem_flags::mem_threadgroup);
  120. for (uint i = ntg[0]/2; i > 0; i /= 2) {
  121. if (tpitg[0] < i) {
  122. buf[tpitg[0]] = MAX(buf[tpitg[0]], buf[tpitg[0] + i]);
  123. }
  124. threadgroup_barrier(mem_flags::mem_threadgroup);
  125. }
  126. // broadcast
  127. if (tpitg[0] == 0) {
  128. buf[0] = buf[0];
  129. }
  130. threadgroup_barrier(mem_flags::mem_threadgroup);
  131. const float max = buf[0];
  132. // parallel sum
  133. buf[tpitg[0]] = 0.0f;
  134. for (int i00 = tpitg[0]; i00 < ne00; i00 += ntg[0]) {
  135. buf[tpitg[0]] += exp(psrc0[i00] - max);
  136. }
  137. // reduce
  138. threadgroup_barrier(mem_flags::mem_threadgroup);
  139. for (uint i = ntg[0]/2; i > 0; i /= 2) {
  140. if (tpitg[0] < i) {
  141. buf[tpitg[0]] += buf[tpitg[0] + i];
  142. }
  143. threadgroup_barrier(mem_flags::mem_threadgroup);
  144. }
  145. // broadcast
  146. if (tpitg[0] == 0) {
  147. buf[0] = buf[0];
  148. }
  149. threadgroup_barrier(mem_flags::mem_threadgroup);
  150. const float sum = buf[0];
  151. for (int i00 = tpitg[0]; i00 < ne00; i00 += ntg[0]) {
  152. pdst[i00] = exp(psrc0[i00] - max) / sum;
  153. }
  154. }
  155. kernel void kernel_diag_mask_inf(
  156. device const float * src0,
  157. device float * dst,
  158. constant int64_t & ne00,
  159. constant int64_t & ne01,
  160. constant int & n_past,
  161. uint3 tpig[[thread_position_in_grid]]) {
  162. const int64_t i02 = tpig[2];
  163. const int64_t i01 = tpig[1];
  164. const int64_t i00 = tpig[0];
  165. if (i00 > n_past + i01) {
  166. dst[i02*ne01*ne00 + i01*ne00 + i00] = -INFINITY;
  167. } else {
  168. dst[i02*ne01*ne00 + i01*ne00 + i00] = src0[i02*ne01*ne00 + i01*ne00 + i00];
  169. }
  170. }
  171. kernel void kernel_get_rows_f16(
  172. device const void * src0,
  173. device const int * src1,
  174. device float * dst,
  175. constant int64_t & ne00,
  176. constant uint64_t & nb01,
  177. constant uint64_t & nb1,
  178. uint tpig[[thread_position_in_grid]]) {
  179. const int i = tpig;
  180. const int r = ((device int32_t *) src1)[i];
  181. for (int j = 0; j < ne00; j++) {
  182. dst[i*nb1 + j] = ((device half *) ((device char *) src0 + r*nb01))[j];
  183. }
  184. }
  185. kernel void kernel_get_rows_q4_0(
  186. device const void * src0,
  187. device const int * src1,
  188. device float * dst,
  189. constant int64_t & ne00,
  190. constant uint64_t & nb01,
  191. constant uint64_t & nb1,
  192. uint tpig[[thread_position_in_grid]]) {
  193. const int i = tpig;
  194. const int r = ((device int32_t *) src1)[i];
  195. dequantize_row_q4_0(
  196. (device const block_q4_0 *) ((device char *) src0 + r*nb01),
  197. (device float *) ((device char *) dst + i*nb1), ne00);
  198. }
  199. kernel void kernel_get_rows_q4_1(
  200. device const void * src0,
  201. device const int * src1,
  202. device float * dst,
  203. constant int64_t & ne00,
  204. constant uint64_t & nb01,
  205. constant uint64_t & nb1,
  206. uint tpig[[thread_position_in_grid]]) {
  207. const int i = tpig;
  208. const int r = ((device int32_t *) src1)[i];
  209. dequantize_row_q4_1(
  210. (device const block_q4_1 *) ((device char *) src0 + r*nb01),
  211. (device float *) ((device char *) dst + i*nb1), ne00);
  212. }
  213. kernel void kernel_rms_norm(
  214. device const void * src0,
  215. device float * dst,
  216. constant int64_t & ne00,
  217. constant uint64_t & nb01,
  218. constant float & eps,
  219. threadgroup float * sum [[threadgroup(0)]],
  220. uint tgpig[[threadgroup_position_in_grid]],
  221. uint tpitg[[thread_position_in_threadgroup]],
  222. uint ntg[[threads_per_threadgroup]]) {
  223. device const float * x = (device const float *) ((device const char *) src0 + tgpig*nb01);
  224. // parallel sum
  225. sum[tpitg] = 0.0f;
  226. for (int i00 = tpitg; i00 < ne00; i00 += ntg) {
  227. sum[tpitg] += x[i00] * x[i00];
  228. }
  229. // reduce
  230. threadgroup_barrier(mem_flags::mem_threadgroup);
  231. for (uint i = ntg/2; i > 0; i /= 2) {
  232. if (tpitg < i) {
  233. sum[tpitg] += sum[tpitg + i];
  234. }
  235. threadgroup_barrier(mem_flags::mem_threadgroup);
  236. }
  237. // broadcast
  238. if (tpitg == 0) {
  239. sum[0] /= ne00;
  240. }
  241. threadgroup_barrier(mem_flags::mem_threadgroup);
  242. const float mean = sum[0];
  243. const float scale = 1.0f/sqrt(mean + eps);
  244. device float * y = dst + tgpig*ne00;
  245. for (int i00 = tpitg; i00 < ne00; i00 += ntg) {
  246. y[i00] = x[i00] * scale;
  247. }
  248. }
  249. kernel void kernel_mul_mat_q4_0_f32(
  250. device const void * src0,
  251. device const float * src1,
  252. device float * dst,
  253. constant int64_t & ne00,
  254. constant int64_t & ne10,
  255. constant int64_t & ne0,
  256. threadgroup float * sum [[threadgroup(0)]],
  257. uint2 tgpig[[threadgroup_position_in_grid]],
  258. uint2 tpitg[[thread_position_in_threadgroup]],
  259. uint2 tptg[[threads_per_threadgroup]]) {
  260. const int nb = ne00/QK4_0;
  261. const int64_t r0 = tgpig.x;
  262. const int64_t r1 = tgpig.y;
  263. device const block_q4_0 * x = (device const block_q4_0 *) src0 + r0*nb;
  264. device const float * y = (device const float *) src1 + r1*ne10;
  265. const int nth = tptg.x*tptg.y;
  266. const int ith = tptg.y*tpitg.x + tpitg.y;
  267. const int ix = tpitg.y/4; // 0 or 1
  268. const int iy = tpitg.y - 4*ix; // 0...3
  269. const int first = 4 * iy;
  270. float sumf = 0;
  271. for (int i = 2*tpitg.x + ix; i < nb; i += 2*tptg.x) {
  272. const float d = (float)x[i].d;
  273. device const uint8_t * xl = x[i].qs + first;
  274. device const float * yl = y + i * QK4_0 + first;
  275. float2 acc = {0.0f, 0.0f};
  276. for (int j = 0; j < 4; ++j) {
  277. acc[0] += yl[j] * (xl[j] & 0xF) + yl[j+16] * (xl[j] >> 4);
  278. acc[1] += yl[j] + yl[j+16];
  279. }
  280. sumf += d * (acc[0] - 8.f*acc[1]);
  281. }
  282. sum[ith] = sumf;
  283. //
  284. // Accumulate the sum from all threads in the threadgroup
  285. //
  286. threadgroup_barrier(mem_flags::mem_threadgroup);
  287. if (ith%4 == 0) {
  288. sum[ith] += sum[ith+1] + sum[ith+2] + sum[ith+3];
  289. }
  290. threadgroup_barrier(mem_flags::mem_threadgroup);
  291. if (ith%16 == 0) {
  292. sum[ith] += sum[ith+4] + sum[ith+8] + sum[ith+12];
  293. }
  294. threadgroup_barrier(mem_flags::mem_threadgroup);
  295. if (ith == 0) {
  296. for (uint i = 16; i < nth; i += 16) sum[0] += sum[i];
  297. dst[r1*ne0 + r0] = sum[0];
  298. }
  299. }
  300. kernel void kernel_mul_mat_q4_1_f32(
  301. device const void * src0,
  302. device const float * src1,
  303. device float * dst,
  304. constant int64_t & ne00,
  305. constant int64_t & ne10,
  306. constant int64_t & ne0,
  307. threadgroup float * sum [[threadgroup(0)]],
  308. uint2 tgpig[[threadgroup_position_in_grid]],
  309. uint2 tpitg[[thread_position_in_threadgroup]],
  310. uint2 tptg[[threads_per_threadgroup]]) {
  311. const int nb = ne00/QK4_1;
  312. const int64_t r0 = tgpig.x;
  313. const int64_t r1 = tgpig.y;
  314. device const block_q4_1 * x = (device const block_q4_1 *) src0 + r0*nb;
  315. device const float * y = (device const float *) src1 + r1*ne10;
  316. const uint nth = tptg.x*tptg.y;
  317. const uint ith = tptg.y*tpitg.x + tpitg.y;
  318. const int ix = tpitg.y/4; // 0 or 1
  319. const int iy = tpitg.y - 4*ix; // 0...3
  320. const int first = 4 * iy;
  321. float sumf = 0;
  322. for (int i = 2*tpitg.x + ix; i < nb; i += 2*tptg.x) {
  323. const float d = (float)x[i].d;
  324. const float m = (float)x[i].m;
  325. device const uint8_t * xl = x[i].qs + first;
  326. device const float * yl = y + i * QK4_1 + first;
  327. float2 acc = {0.0f, 0.0f};
  328. for (int j = 0; j < 4; ++j) {
  329. acc[0] += yl[j+ 0] * (d * (xl[j] & 0xF) + m);
  330. acc[1] += yl[j+16] * (d * (xl[j] >> 4) + m);
  331. }
  332. sumf += acc[0] + acc[1];
  333. }
  334. sum[ith] = sumf;
  335. //
  336. // Accumulate the sum from all threads in the threadgroup
  337. //
  338. threadgroup_barrier(mem_flags::mem_threadgroup);
  339. if (ith%4 == 0) {
  340. sum[ith] += sum[ith+1] + sum[ith+2] + sum[ith+3];
  341. }
  342. threadgroup_barrier(mem_flags::mem_threadgroup);
  343. if (ith%16 == 0) {
  344. sum[ith] += sum[ith+4] + sum[ith+8] + sum[ith+12];
  345. }
  346. threadgroup_barrier(mem_flags::mem_threadgroup);
  347. if (ith == 0) {
  348. for (int i = 16; i < nth; i += 16) sum[0] += sum[i];
  349. dst[r1*ne0 + r0] = sum[0];
  350. }
  351. }
  352. kernel void kernel_mul_mat_f16_f32(
  353. device const char * src0,
  354. device const char * src1,
  355. device float * dst,
  356. constant int64_t & ne00,
  357. constant int64_t & ne01,
  358. constant uint64_t & nb00,
  359. constant uint64_t & nb01,
  360. constant uint64_t & nb02,
  361. constant int64_t & ne10,
  362. constant int64_t & ne11,
  363. constant uint64_t & nb10,
  364. constant uint64_t & nb11,
  365. constant uint64_t & nb12,
  366. constant int64_t & ne0,
  367. constant int64_t & ne1,
  368. threadgroup float * sum [[threadgroup(0)]],
  369. uint3 tgpig[[threadgroup_position_in_grid]],
  370. uint3 tpig[[thread_position_in_grid]],
  371. uint3 tpitg[[thread_position_in_threadgroup]],
  372. uint3 tptg[[threads_per_threadgroup]]) {
  373. const int64_t r0 = tgpig.x;
  374. const int64_t r1 = tgpig.y;
  375. const int64_t im = tgpig.z;
  376. device const half * x = (device const half *) (src0 + r0*nb01 + im*nb02);
  377. device const float * y = (device const float *) (src1 + r1*nb11 + im*nb12);
  378. sum[tpitg.x] = 0.0f;
  379. for (int i = tpitg.x; i < ne00; i += tptg.x) {
  380. sum[tpitg.x] += (float) x[i] * (float) y[i];
  381. }
  382. // accumulate the sum from all threads in the threadgroup
  383. threadgroup_barrier(mem_flags::mem_threadgroup);
  384. for (uint i = tptg.x/2; i > 0; i /= 2) {
  385. if (tpitg.x < i) {
  386. sum[tpitg.x] += sum[tpitg.x + i];
  387. }
  388. threadgroup_barrier(mem_flags::mem_threadgroup);
  389. }
  390. if (tpitg.x == 0) {
  391. dst[im*ne1*ne0 + r1*ne0 + r0] = sum[0];
  392. }
  393. }
  394. kernel void kernel_rope(
  395. device const void * src0,
  396. device float * dst,
  397. constant int64_t & ne00,
  398. constant int64_t & ne01,
  399. constant int64_t & ne02,
  400. constant int64_t & ne03,
  401. constant uint64_t & nb00,
  402. constant uint64_t & nb01,
  403. constant uint64_t & nb02,
  404. constant uint64_t & nb03,
  405. constant int64_t & ne0,
  406. constant int64_t & ne1,
  407. constant int64_t & ne2,
  408. constant int64_t & ne3,
  409. constant uint64_t & nb0,
  410. constant uint64_t & nb1,
  411. constant uint64_t & nb2,
  412. constant uint64_t & nb3,
  413. constant int & n_past,
  414. constant int & n_dims,
  415. constant int & mode,
  416. uint3 tpig[[thread_position_in_grid]]) {
  417. const int64_t i3 = tpig[2];
  418. const int64_t i2 = tpig[1];
  419. const int64_t i1 = tpig[0];
  420. const bool is_neox = mode & 2;
  421. const float theta_scale = pow(10000.0, -2.0f/n_dims);
  422. const int64_t p = ((mode & 1) == 0 ? n_past + i2 : i2);
  423. float theta = (float)p;
  424. if (!is_neox) {
  425. for (int64_t i0 = 0; i0 < ne0; i0 += 2) {
  426. const float cos_theta = cos(theta);
  427. const float sin_theta = sin(theta);
  428. theta *= theta_scale;
  429. device const float * const src = (device float *)((device char *) src0 + i3*nb03 + i2*nb02 + i1*nb01 + i0*nb00);
  430. device float * dst_data = (device float *)((device char *) dst + i3*nb3 + i2*nb2 + i1*nb1 + i0*nb0);
  431. const float x0 = src[0];
  432. const float x1 = src[1];
  433. dst_data[0] = x0*cos_theta - x1*sin_theta;
  434. dst_data[1] = x0*sin_theta + x1*cos_theta;
  435. }
  436. } else {
  437. // TODO: implement
  438. }
  439. }
  440. kernel void kernel_cpy_f32_f16(
  441. device const float * src0,
  442. device half * dst,
  443. constant int64_t & ne00,
  444. constant int64_t & ne01,
  445. constant int64_t & ne02,
  446. constant int64_t & ne03,
  447. constant uint64_t & nb00,
  448. constant uint64_t & nb01,
  449. constant uint64_t & nb02,
  450. constant uint64_t & nb03,
  451. constant int64_t & ne0,
  452. constant int64_t & ne1,
  453. constant int64_t & ne2,
  454. constant int64_t & ne3,
  455. constant uint64_t & nb0,
  456. constant uint64_t & nb1,
  457. constant uint64_t & nb2,
  458. constant uint64_t & nb3,
  459. uint3 tgpig[[threadgroup_position_in_grid]],
  460. uint3 tpitg[[thread_position_in_threadgroup]],
  461. uint3 ntg[[threads_per_threadgroup]]) {
  462. const int64_t i03 = tgpig[2];
  463. const int64_t i02 = tgpig[1];
  464. const int64_t i01 = tgpig[0];
  465. const int64_t n = i03*ne02*ne01*ne00 + i02*ne01*ne00 + i01*ne00;
  466. const int64_t i3 = n / (ne2*ne1*ne0);
  467. const int64_t i2 = (n - i3*ne2*ne1*ne0) / (ne1*ne0);
  468. const int64_t i1 = (n - i3*ne2*ne1*ne0 - i2*ne1*ne0) / ne0;
  469. const int64_t i0 = (n - i3*ne2*ne1*ne0 - i2*ne1*ne0 - i1*ne0);
  470. device half * dst_data = (device half *) ((device char *) dst + i3*nb3 + i2*nb2 + i1*nb1 + i0*nb0);
  471. for (int64_t i00 = tpitg.x; i00 < ne00; i00 += ntg.x) {
  472. device const float * src = (device float *)((device char *) src0 + i03*nb03 + i02*nb02 + i01*nb01 + i00*nb00);
  473. dst_data[i00] = src[0];
  474. }
  475. }
  476. kernel void kernel_cpy_f32_f32(
  477. device const float * src0,
  478. device float * dst,
  479. constant int64_t & ne00,
  480. constant int64_t & ne01,
  481. constant int64_t & ne02,
  482. constant int64_t & ne03,
  483. constant uint64_t & nb00,
  484. constant uint64_t & nb01,
  485. constant uint64_t & nb02,
  486. constant uint64_t & nb03,
  487. constant int64_t & ne0,
  488. constant int64_t & ne1,
  489. constant int64_t & ne2,
  490. constant int64_t & ne3,
  491. constant uint64_t & nb0,
  492. constant uint64_t & nb1,
  493. constant uint64_t & nb2,
  494. constant uint64_t & nb3,
  495. uint3 tgpig[[threadgroup_position_in_grid]],
  496. uint3 tpitg[[thread_position_in_threadgroup]],
  497. uint3 ntg[[threads_per_threadgroup]]) {
  498. const int64_t i03 = tgpig[2];
  499. const int64_t i02 = tgpig[1];
  500. const int64_t i01 = tgpig[0];
  501. const int64_t n = i03*ne02*ne01*ne00 + i02*ne01*ne00 + i01*ne00;
  502. const int64_t i3 = n / (ne2*ne1*ne0);
  503. const int64_t i2 = (n - i3*ne2*ne1*ne0) / (ne1*ne0);
  504. const int64_t i1 = (n - i3*ne2*ne1*ne0 - i2*ne1*ne0) / ne0;
  505. const int64_t i0 = (n - i3*ne2*ne1*ne0 - i2*ne1*ne0 - i1*ne0);
  506. device float * dst_data = (device float *) ((device char *) dst + i3*nb3 + i2*nb2 + i1*nb1 + i0*nb0);
  507. for (int64_t i00 = tpitg.x; i00 < ne00; i00 += ntg.x) {
  508. device const float * src = (device float *)((device char *) src0 + i03*nb03 + i02*nb02 + i01*nb01 + i00*nb00);
  509. dst_data[i00] = src[0];
  510. }
  511. }
  512. //============================================ k-quants ======================================================
  513. #define QK_K 256
  514. typedef struct {
  515. uint8_t scales[QK_K/16]; // scales and mins, quantized with 4 bits
  516. uint8_t qs[QK_K/4]; // quants
  517. half d; // super-block scale for quantized scales
  518. half dmin; // super-block scale for quantized mins
  519. } block_q2_k;
  520. // 84 bytes / block
  521. typedef struct {
  522. uint8_t hmask[QK_K/8]; // quants - high bit
  523. uint8_t qs[QK_K/4]; // quants - low 2 bits
  524. uint8_t scales[3*QK_K/64]; // scales, quantized with 6 bits
  525. half d; // super-block scale
  526. } block_q3_k;
  527. // 110 bytes / block
  528. typedef struct {
  529. half d; // super-block scale for quantized scales
  530. half dmin; // super-block scale for quantized mins
  531. uint8_t scales[3*QK_K/64]; // scales and mins, quantized with 6 bits
  532. uint8_t qs[QK_K/2]; // 4--bit quants
  533. } block_q4_k;
  534. // 144 bytes / block
  535. typedef struct {
  536. half d; // super-block scale for quantized scales
  537. half dmin; // super-block scale for quantized mins
  538. uint8_t scales[3*QK_K/64]; // scales and mins, quantized with 6 bits
  539. uint8_t qh[QK_K/8]; // quants, high bit
  540. uint8_t qs[QK_K/2]; // quants, low 4 bits
  541. } block_q5_k;
  542. // 176 bytes / block
  543. typedef struct {
  544. uint8_t ql[QK_K/2]; // quants, lower 4 bits
  545. uint8_t qh[QK_K/4]; // quants, upper 2 bits
  546. int8_t scales[QK_K/16]; // scales, quantized with 8 bits
  547. half d; // super-block scale
  548. } block_q6_k;
  549. // 210 bytes / block
  550. static inline uchar4 get_scale_min_k4(int j, device const uint8_t * q) {
  551. uchar4 r;
  552. if (j < 4) {
  553. r[0] = q[j+0] & 63;
  554. r[2] = q[j+1] & 63;
  555. r[1] = q[j+4] & 63;
  556. r[3] = q[j+5] & 63;
  557. } else {
  558. r[0] = (q[j+4] & 0xF) | ((q[j-4] >> 6) << 4);
  559. r[2] = (q[j+5] & 0xF) | ((q[j-3] >> 6) << 4);
  560. r[1] = (q[j+4] >> 4) | ((q[j-0] >> 6) << 4);
  561. r[3] = (q[j+5] >> 4) | ((q[j+1] >> 6) << 4);
  562. }
  563. return r;
  564. }
  565. //========================================== dequantization =============================
  566. static void dequantize_row_q2_k(device const block_q2_k * x, device float * y, int k) {
  567. assert(k % QK_K == 0);
  568. const int nb = k / QK_K;
  569. for (int i = 0; i < nb; i++) {
  570. const float d = x[i].d;
  571. const float min = x[i].dmin;
  572. device const uint8_t * q = x[i].qs;
  573. int is = 0;
  574. float dl, ml;
  575. for (int n = 0; n < QK_K; n += 128) {
  576. int shift = 0;
  577. for (int j = 0; j < 4; ++j) {
  578. uint8_t sc = x[i].scales[is++];
  579. dl = d * (sc & 0xF); ml = min * (sc >> 4);
  580. for (int l = 0; l < 16; ++l) *y++ = dl * ((int8_t)((q[l] >> shift) & 3)) - ml;
  581. sc = x[i].scales[is++];
  582. dl = d * (sc & 0xF); ml = min * (sc >> 4);
  583. for (int l = 0; l < 16; ++l) *y++ = dl * ((int8_t)((q[l+16] >> shift) & 3)) - ml;
  584. shift += 2;
  585. }
  586. q += 32;
  587. }
  588. }
  589. }
  590. static void dequantize_row_q3_k(device const block_q3_k * x, device float * y, int k) {
  591. assert(k % QK_K == 0);
  592. const int nb = k / QK_K;
  593. const uint16_t kmask1 = 0x0303;
  594. const uint16_t kmask2 = 0x0f0f;
  595. uint16_t aux[8];
  596. thread const int8_t * scales = (thread const int8_t*)aux;
  597. for (int i = 0; i < nb; i++) {
  598. const float d_all = (float)(x[i].d);
  599. device const uint8_t * q = x[i].qs;
  600. device const uint8_t * h = x[i].hmask;
  601. uint8_t m = 1;
  602. device const uint16_t * a = (device const uint16_t *)x[i].scales;
  603. aux[0] = (a[0] & kmask2) | (((a[4] >> 0) & kmask1) << 4);
  604. aux[1] = (a[1] & kmask2) | (((a[5] >> 0) & kmask1) << 4);
  605. aux[2] = (a[2] & kmask2) | (((a[4] >> 2) & kmask1) << 4);
  606. aux[3] = (a[3] & kmask2) | (((a[5] >> 2) & kmask1) << 4);
  607. aux[4] = ((a[0] >> 4) & kmask2) | (((a[4] >> 4) & kmask1) << 4);
  608. aux[5] = ((a[1] >> 4) & kmask2) | (((a[5] >> 4) & kmask1) << 4);
  609. aux[6] = ((a[2] >> 4) & kmask2) | (((a[4] >> 6) & kmask1) << 4);
  610. aux[7] = ((a[3] >> 4) & kmask2) | (((a[5] >> 6) & kmask1) << 4);
  611. int is = 0;
  612. float dl;
  613. for (int n = 0; n < QK_K; n += 128) {
  614. int shift = 0;
  615. for (int j = 0; j < 4; ++j) {
  616. dl = d_all * (scales[is++] - 32);
  617. for (int l = 0; l < 16; ++l) {
  618. *y++ = dl * ((int8_t)((q[l+ 0] >> shift) & 3) - ((h[l+ 0] & m) ? 0 : 4));
  619. }
  620. dl = d_all * (scales[is++] - 32);
  621. for (int l = 0; l < 16; ++l) {
  622. *y++ = dl * ((int8_t)((q[l+16] >> shift) & 3) - ((h[l+16] & m) ? 0 : 4));
  623. }
  624. shift += 2;
  625. m <<= 1;
  626. }
  627. q += 32;
  628. }
  629. }
  630. }
  631. static void dequantize_row_q4_k(device const block_q4_k * x, device float * y, int k) {
  632. assert(k % QK_K == 0);
  633. const int nb = k / QK_K;
  634. for (int i = 0; i < nb; i++) {
  635. const float d = x[i].d;
  636. const float min = x[i].dmin;
  637. device const uint8_t * q = x[i].qs;
  638. device const uint8_t * scales = x[i].scales;
  639. int is = 0;
  640. for (int j = 0; j < QK_K; j += 64) {
  641. const uchar4 sc = get_scale_min_k4(is, scales);
  642. const float d1 = d * sc[0]; const float m1 = min * sc[1];
  643. const float d2 = d * sc[2]; const float m2 = min * sc[3];
  644. for (int l = 0; l < 32; ++l) *y++ = d1 * (q[l] & 0xF) - m1;
  645. for (int l = 0; l < 32; ++l) *y++ = d2 * (q[l] >> 4) - m2;
  646. q += 32; is += 2;
  647. }
  648. }
  649. }
  650. static void dequantize_row_q5_k(device const block_q5_k * x, device float * y, int k) {
  651. assert(k % QK_K == 0);
  652. const int nb = k / QK_K;
  653. for (int i = 0; i < nb; i++) {
  654. const float d = (float)(x[i].d);
  655. const float min = (float)(x[i].dmin);
  656. device const uint8_t * ql = x[i].qs;
  657. device const uint8_t * qh = x[i].qh;
  658. int is = 0;
  659. uint8_t u1 = 1, u2 = 2;
  660. for (int j = 0; j < QK_K; j += 64) {
  661. const uchar4 sc = get_scale_min_k4(is, x[i].scales);
  662. const float d1 = d * sc[0]; const float m1 = min * sc[1];
  663. const float d2 = d * sc[2]; const float m2 = min * sc[3];
  664. for (int l = 0; l < 32; ++l) *y++ = d1 * ((ql[l] & 0xF) + (qh[l] & u1 ? 16 : 0)) - m1;
  665. for (int l = 0; l < 32; ++l) *y++ = d2 * ((ql[l] >> 4) + (qh[l] & u2 ? 16 : 0)) - m2;
  666. ql += 32; is += 2;
  667. u1 <<= 2; u2 <<= 2;
  668. }
  669. }
  670. }
  671. static void dequantize_row_q6_k(device const block_q6_k * x, device float * y, int k) {
  672. assert(k % QK_K == 0);
  673. const int nb = k / QK_K;
  674. for (int i = 0; i < nb; i++) {
  675. device const uint8_t * ql = x[i].ql;
  676. device const uint8_t * qh = x[i].qh;
  677. device const int8_t * sc = x[i].scales;
  678. const float d = x[i].d;
  679. for (int n = 0; n < QK_K; n += 128) {
  680. for (int l = 0; l < 32; ++l) {
  681. int is = l/16;
  682. const int8_t q1 = (int8_t)((ql[l + 0] & 0xF) | (((qh[l] >> 0) & 3) << 4)) - 32;
  683. const int8_t q2 = (int8_t)((ql[l + 32] & 0xF) | (((qh[l] >> 2) & 3) << 4)) - 32;
  684. const int8_t q3 = (int8_t)((ql[l + 0] >> 4) | (((qh[l] >> 4) & 3) << 4)) - 32;
  685. const int8_t q4 = (int8_t)((ql[l + 32] >> 4) | (((qh[l] >> 6) & 3) << 4)) - 32;
  686. y[l + 0] = d * sc[is + 0] * q1;
  687. y[l + 32] = d * sc[is + 2] * q2;
  688. y[l + 64] = d * sc[is + 4] * q3;
  689. y[l + 96] = d * sc[is + 6] * q4;
  690. }
  691. y += 128;
  692. ql += 64;
  693. qh += 32;
  694. sc += 8;
  695. }
  696. }
  697. }
  698. kernel void kernel_get_rows_q2_k(
  699. device const void * src0,
  700. device const int * src1,
  701. device float * dst,
  702. constant int64_t & ne00,
  703. constant uint64_t & nb01,
  704. constant uint64_t & nb1,
  705. uint tpig[[thread_position_in_grid]]) {
  706. const int i = tpig;
  707. const int r = ((device int32_t *) src1)[i];
  708. dequantize_row_q2_k(
  709. (device const block_q2_k *) ((device char *) src0 + r*nb01),
  710. (device float *) ((device char *) dst + i*nb1), ne00);
  711. }
  712. kernel void kernel_get_rows_q3_k(
  713. device const void * src0,
  714. device const int * src1,
  715. device float * dst,
  716. constant int64_t & ne00,
  717. constant uint64_t & nb01,
  718. constant uint64_t & nb1,
  719. uint tpig[[thread_position_in_grid]]) {
  720. const int i = tpig;
  721. const int r = ((device int32_t *) src1)[i];
  722. dequantize_row_q3_k(
  723. (device const block_q3_k *) ((device char *) src0 + r*nb01),
  724. (device float *) ((device char *) dst + i*nb1), ne00);
  725. }
  726. kernel void kernel_get_rows_q4_k(
  727. device const void * src0,
  728. device const int * src1,
  729. device float * dst,
  730. constant int64_t & ne00,
  731. constant uint64_t & nb01,
  732. constant uint64_t & nb1,
  733. uint tpig[[thread_position_in_grid]]) {
  734. const int i = tpig;
  735. const int r = ((device int32_t *) src1)[i];
  736. dequantize_row_q4_k(
  737. (device const block_q4_k *) ((device char *) src0 + r*nb01),
  738. (device float *) ((device char *) dst + i*nb1), ne00);
  739. }
  740. kernel void kernel_get_rows_q5_k(
  741. device const void * src0,
  742. device const int * src1,
  743. device float * dst,
  744. constant int64_t & ne00,
  745. constant uint64_t & nb01,
  746. constant uint64_t & nb1,
  747. uint tpig[[thread_position_in_grid]]) {
  748. const int i = tpig;
  749. const int r = ((device int32_t *) src1)[i];
  750. dequantize_row_q5_k(
  751. (device const block_q5_k *) ((device char *) src0 + r*nb01),
  752. (device float *) ((device char *) dst + i*nb1), ne00);
  753. }
  754. kernel void kernel_get_rows_q6_k(
  755. device const void * src0,
  756. device const int * src1,
  757. device float * dst,
  758. constant int64_t & ne00,
  759. constant uint64_t & nb01,
  760. constant uint64_t & nb1,
  761. uint tpig[[thread_position_in_grid]]) {
  762. const int i = tpig;
  763. const int r = ((device int32_t *) src1)[i];
  764. dequantize_row_q6_k(
  765. (device const block_q6_k *) ((device char *) src0 + r*nb01),
  766. (device float *) ((device char *) dst + i*nb1), ne00);
  767. }
  768. //====================================== dot products =========================
  769. kernel void kernel_mul_mat_q2_k_f32(
  770. device const void * src0,
  771. device const float * src1,
  772. device float * dst,
  773. constant int64_t & ne00,
  774. constant int64_t & ne10,
  775. constant int64_t & ne0,
  776. threadgroup float * sum [[threadgroup(0)]],
  777. uint2 tgpig[[threadgroup_position_in_grid]],
  778. uint2 tpitg[[thread_position_in_threadgroup]],
  779. uint2 tptg[[threads_per_threadgroup]]) {
  780. const int nb = ne00/QK_K;
  781. const int64_t r0 = tgpig.x;
  782. const int64_t r1 = tgpig.y;
  783. device const block_q2_k * x = (device const block_q2_k *) src0 + r0*nb;
  784. device const float * yy = (device const float *) src1 + r1*ne10;
  785. const int nth = tptg.x*tptg.y;
  786. const int ith = tptg.y*tpitg.x + tpitg.y;
  787. const int tid = tpitg.y; // 0...16
  788. const int il = tid/4; // 0...3
  789. const int ir = tid%4; // 0...3
  790. const int ip = il/2; // 0 or 1
  791. const int shift1 = 4*(il%2);// 0 or 4
  792. const int shift2 = shift1+2;// 2 or 6
  793. const int n = 8;
  794. const int is = 4*il + (n*ir)/16;
  795. const int y_offset = 64*il + n*ir;
  796. const int q_offset = 32*ip + n*ir;
  797. sum[ith] = 0.0f;
  798. float sumf = 0;
  799. for (int i = tpitg.x; i < nb; i += tptg.x) {
  800. device const uint8_t * q = x[i].qs + q_offset;
  801. device const uint8_t * scales = x[i].scales + is;
  802. uint8_t d1 = scales[0] & 0xF;
  803. uint8_t d2 = scales[2] & 0xF;
  804. uint8_t m1 = scales[0] >> 4;
  805. uint8_t m2 = scales[2] >> 4;
  806. device const float * y = yy + i*QK_K + y_offset;
  807. //float4 s = {0.f, 0.f, 0.f, 0.f};
  808. float2 s = {0.f, 0.f};
  809. float smin = 0;
  810. for (int l = 0; l < n; ++l) {
  811. s[0] += y[l+ 0] * ((q[l] >> shift1) & 3);
  812. s[1] += y[l+32] * ((q[l] >> shift2) & 3);
  813. smin += y[l+ 0] * m1 + y[l+32] * m2;
  814. }
  815. const float dall = (float)x[i].d;
  816. const float dmin = (float)x[i].dmin;
  817. sumf += dall * (s[0] * d1 + s[1] * d2) - dmin * smin;
  818. }
  819. sum[ith] = sumf;
  820. //int mask1 = (ith%4 == 0);
  821. //int mask2 = (ith%16 == 0);
  822. //threadgroup_barrier(mem_flags::mem_threadgroup);
  823. //for (int i = 1; i < 4; ++i) sum[ith] += mask1 * sum[ith + i];
  824. //threadgroup_barrier(mem_flags::mem_threadgroup);
  825. //for (int i = 4; i < 16; i += 4) sum[ith] += mask2 * sum[ith + i];
  826. //threadgroup_barrier(mem_flags::mem_threadgroup);
  827. //if (ith == 0) {
  828. // for (int i = 16; i < nth; i += 16) sum[0] += sum[i];
  829. // dst[r1*ne0 + r0] = sum[0];
  830. //}
  831. //
  832. // Accumulate the sum from all threads in the threadgroup
  833. // This version is slightly faster than the commented out one below,
  834. // which I copy-pasted from ggerganov's q4_0 dot product for metal.
  835. //
  836. threadgroup_barrier(mem_flags::mem_threadgroup);
  837. if (ith%4 == 0) {
  838. for (int i = 1; i < 4; ++i) sum[ith] += sum[ith + i];
  839. }
  840. threadgroup_barrier(mem_flags::mem_threadgroup);
  841. if (ith%16 == 0) {
  842. for (int i = 4; i < 16; i += 4) sum[ith] += sum[ith + i];
  843. }
  844. threadgroup_barrier(mem_flags::mem_threadgroup);
  845. if (ith == 0) {
  846. for (int i = 16; i < nth; i += 16) sum[0] += sum[i];
  847. dst[r1*ne0 + r0] = sum[0];
  848. }
  849. }
  850. kernel void kernel_mul_mat_q3_k_f32(
  851. device const void * src0,
  852. device const float * src1,
  853. device float * dst,
  854. constant int64_t & ne00,
  855. constant int64_t & ne10,
  856. constant int64_t & ne0,
  857. constant int64_t & ne1,
  858. threadgroup float * sum [[threadgroup(0)]],
  859. uint2 tgpig[[threadgroup_position_in_grid]],
  860. uint2 tpitg[[thread_position_in_threadgroup]],
  861. uint2 tptg[[threads_per_threadgroup]]) {
  862. const uint16_t kmask1 = 0x0303;
  863. const uint16_t kmask2 = 0x0f0f;
  864. const uint8_t m3 = 3;
  865. const int8_t m4 = 4;
  866. const int nb = ne00/QK_K;
  867. const int64_t r0 = tgpig.x;
  868. const int64_t r1 = tgpig.y;
  869. device const block_q3_k * x = (device const block_q3_k *) src0 + r0*nb;
  870. device const float * yy = (device const float *) src1 + r1*ne10;
  871. const int nth = tptg.x*tptg.y;
  872. const int ith = tptg.y*tpitg.x + tpitg.y;
  873. const int tid = tpitg.y; // expecting 16
  874. const int ip = tid/8; // 0 or 1
  875. const int il = tid/2 - 4*ip; // 0...3
  876. const int ir = tid%2;
  877. const int n = 8;
  878. const int l0 = n*ir;
  879. const uint8_t m = 1 << (4*ip + il);
  880. const int shift = 2*il;
  881. const uint16_t s_shift1 = 4*ip;
  882. const uint16_t s_shift2 = s_shift1 + 2*(il/2);
  883. const int ik = 4 + (il%2);
  884. const int q_offset = 32*ip + l0;
  885. const int y_offset = 128*ip + 32*il + l0;
  886. //float sumf = 0;
  887. float sumf1 = 0, sumf2 = 0;
  888. for (int i = tpitg.x; i < nb; i += tptg.x) {
  889. const float d_all = (float)(x[i].d);
  890. device const uint8_t * q = x[i].qs + q_offset;
  891. device const uint8_t * h = x[i].hmask + l0;
  892. device const float * y = yy + i * QK_K + y_offset;
  893. device const uint16_t * a = (device const uint16_t *)x[i].scales;
  894. const char2 scales = as_type<char2>((uint16_t)(((a[il] >> s_shift1) & kmask2) | (((a[ik] >> s_shift2) & kmask1) << 4)));
  895. float s = 0;
  896. for (int l = 0; l < n; ++l) {
  897. s += y[l+ 0] * ((int8_t)((q[l+ 0] >> shift) & m3) - ((h[l+ 0] & m) ? 0 : m4));
  898. }
  899. float d = d_all * s;
  900. sumf1 += d * scales[0];
  901. sumf2 += d;
  902. //sumf += d_all * s * (scales[0] - 32);
  903. s = 0;
  904. for (int l = 0; l < n; ++l) {
  905. s += y[l+16] * ((int8_t)((q[l+16] >> shift) & m3) - ((h[l+16] & m) ? 0 : m4));
  906. }
  907. d = d_all * s;
  908. sumf1 += d * scales[1];
  909. sumf2 += d;
  910. //sumf += d_all * s * (scales[1] - 32);
  911. }
  912. //sum[ith] = sumf;
  913. sum[ith] = sumf1 - 32.f*sumf2;
  914. //
  915. // Accumulate the sum from all threads in the threadgroup
  916. //
  917. threadgroup_barrier(mem_flags::mem_threadgroup);
  918. if (ith%4 == 0) {
  919. for (int i = 1; i < 4; ++i) sum[ith] += sum[ith + i];
  920. }
  921. threadgroup_barrier(mem_flags::mem_threadgroup);
  922. if (ith%16 == 0) {
  923. for (int i = 4; i < 16; i += 4) sum[ith] += sum[ith + i];
  924. }
  925. threadgroup_barrier(mem_flags::mem_threadgroup);
  926. if (ith == 0) {
  927. for (int i = 16; i < nth; i += 16) sum[0] += sum[i];
  928. dst[r1*ne0 + r0] = sum[0];
  929. }
  930. }
  931. kernel void kernel_mul_mat_q4_k_f32(
  932. device const void * src0,
  933. device const float * src1,
  934. device float * dst,
  935. constant int64_t & ne00,
  936. constant int64_t & ne10,
  937. constant int64_t & ne0,
  938. threadgroup float * sum [[threadgroup(0)]],
  939. uint2 tgpig[[threadgroup_position_in_grid]],
  940. uint2 tpitg[[thread_position_in_threadgroup]],
  941. uint2 tptg[[threads_per_threadgroup]]) {
  942. const uint16_t kmask1 = 0x3f3f;
  943. const uint16_t kmask2 = 0x0f0f;
  944. const uint16_t kmask3 = 0xc0c0;
  945. const int nb = ne00/QK_K;
  946. const int64_t r0 = tgpig.x;
  947. const int64_t r1 = tgpig.y;
  948. device const block_q4_k * x = (device const block_q4_k *) src0 + r0*nb;
  949. device const float * yy = (device const float *) src1 + r1*ne10;
  950. const int nth = tptg.x*tptg.y;
  951. const int ith = tptg.y*tpitg.x + tpitg.y;
  952. const int tid = tpitg.y; // 0...16
  953. const int il = tid/4; // 0...3
  954. const int ir = tid - 4*il;// 0...3
  955. const int n = 4;
  956. const int im = il/2; // 0 or 1. 0 computes 0,32 + 128,160, 1 computes 64,96 + 192,224
  957. const int in = il%2;
  958. const int l0 = n*(2*ir + in);
  959. const int q_offset = 32*im + l0;
  960. const int y_offset = 64*im + l0;
  961. sum[ith] = 0.0f;
  962. uchar2 sc1, sc2, sc3, sc4;
  963. float sumf = 0;
  964. for (int i = tpitg.x; i < nb; i += tptg.x) {
  965. device const uint8_t * q1 = (x + i)->qs + q_offset;
  966. device const uint8_t * q2 = q1 + 64;
  967. device const float * y1 = yy + i*QK_K + y_offset;
  968. device const float * y2 = y1 + 128;
  969. const float dall = (float)((x + i)->d);
  970. const float dmin = (float)((x + i)->dmin);
  971. device const uint16_t * a = (device const uint16_t *)(x + i)->scales;
  972. sc1 = as_type<uchar2>((uint16_t)(a[im+0] & kmask1));
  973. sc2 = as_type<uchar2>((uint16_t)(a[im+2] & kmask1));
  974. sc3 = as_type<uchar2>((uint16_t)(((a[im+4] >> 0) & kmask2) | ((a[im+0] & kmask3) >> 2)));
  975. sc4 = as_type<uchar2>((uint16_t)(((a[im+4] >> 4) & kmask2) | ((a[im+2] & kmask3) >> 2)));
  976. float4 s = {0.f, 0.f, 0.f, 0.f};
  977. float smin = 0;
  978. for (int l = 0; l < n; ++l) {
  979. s[0] += y1[l] * (q1[l] & 0xF); s[1] += y1[l+32] * (q1[l] >> 4);
  980. s[2] += y2[l] * (q2[l] & 0xF); s[3] += y2[l+32] * (q2[l] >> 4);
  981. smin += y1[l] * sc2[0] + y1[l+32] * sc2[1] + y2[l] * sc4[0] + y2[l+32] * sc4[1];
  982. }
  983. sumf += dall * (s[0] * sc1[0] + s[1] * sc1[1] + s[2] * sc3[0] + s[3] * sc3[1]) - dmin * smin;
  984. }
  985. sum[ith] = sumf;
  986. //
  987. // Accumulate the sum from all threads in the threadgroup
  988. // This version is slightly faster than the commented out one below,
  989. // which I copy-pasted from ggerganov's q4_0 dot product for metal.
  990. //
  991. threadgroup_barrier(mem_flags::mem_threadgroup);
  992. if (ith%4 == 0) {
  993. for (int i = 1; i < 4; ++i) sum[ith] += sum[ith + i];
  994. }
  995. threadgroup_barrier(mem_flags::mem_threadgroup);
  996. if (ith%16 == 0) {
  997. for (int i = 4; i < 16; i += 4) sum[ith] += sum[ith + i];
  998. }
  999. threadgroup_barrier(mem_flags::mem_threadgroup);
  1000. if (ith == 0) {
  1001. for (int i = 16; i < nth; i += 16) sum[0] += sum[i];
  1002. dst[r1*ne0 + r0] = sum[0];
  1003. }
  1004. //// accumulate the sum from all threads in the threadgroup
  1005. //threadgroup_barrier(mem_flags::mem_threadgroup);
  1006. //for (uint i = nth/2; i > 0; i /= 2) {
  1007. // if (ith < i) {
  1008. // sum[ith] += sum[ith + i];
  1009. // }
  1010. // threadgroup_barrier(mem_flags::mem_threadgroup);
  1011. //}
  1012. //if (ith == 0) {
  1013. // dst[r1*ne0 + r0] = sum[0];
  1014. //}
  1015. }
  1016. kernel void kernel_mul_mat_q5_k_f32(
  1017. device const void * src0,
  1018. device const float * src1,
  1019. device float * dst,
  1020. constant int64_t & ne00,
  1021. constant int64_t & ne10,
  1022. constant int64_t & ne0,
  1023. threadgroup float * sum [[threadgroup(0)]],
  1024. uint2 tgpig[[threadgroup_position_in_grid]],
  1025. uint2 tpitg[[thread_position_in_threadgroup]],
  1026. uint2 tptg[[threads_per_threadgroup]]) {
  1027. const uint16_t kmask1 = 0x3f3f;
  1028. const uint16_t kmask2 = 0x0f0f;
  1029. const uint16_t kmask3 = 0xc0c0;
  1030. const int nb = ne00/QK_K;
  1031. const int64_t r0 = tgpig.x;
  1032. const int64_t r1 = tgpig.y;
  1033. device const block_q5_k * x = (device const block_q5_k *) src0 + r0*nb;
  1034. device const float * yy = (device const float *) src1 + r1*ne10;
  1035. const int nth = tptg.x*tptg.y;
  1036. const int ith = tptg.y*tpitg.x + tpitg.y;
  1037. const int tid = tpitg.y; // 0...16
  1038. const int il = tid/4; // 0...3
  1039. const int ir = tid - 4*il;// 0...3
  1040. const int n = 4;
  1041. const int im = il/2; // 0 or 1. 0 computes 0,32 + 128,160, 1 computes 64,96 + 192,224
  1042. const int in = il%2;
  1043. const int l0 = n*(2*ir + in);
  1044. const int q_offset = 32*im + l0;
  1045. const int y_offset = 64*im + l0;
  1046. const uint8_t hm1 = 1u << (2*im);
  1047. const uint8_t hm2 = hm1 << 1;
  1048. const uint8_t hm3 = hm1 << 4;
  1049. const uint8_t hm4 = hm2 << 4;
  1050. uchar2 sc1, sc2, sc3, sc4;
  1051. float sumf = 0;
  1052. for (int i = tpitg.x; i < nb; i += tptg.x) {
  1053. device const uint8_t * q1 = (x + i)->qs + q_offset;
  1054. device const uint8_t * q2 = q1 + 64;
  1055. device const uint8_t * qh = (x + i)->qh + l0;
  1056. device const float * y1 = yy + i*QK_K + y_offset;
  1057. device const float * y2 = y1 + 128;
  1058. const float dall = (float)((x + i)->d);
  1059. const float dmin = (float)((x + i)->dmin);
  1060. device const uint16_t * a = (device const uint16_t *)(x + i)->scales;
  1061. sc1 = as_type<uchar2>((uint16_t)(a[im+0] & kmask1));
  1062. sc2 = as_type<uchar2>((uint16_t)(a[im+2] & kmask1));
  1063. sc3 = as_type<uchar2>((uint16_t)(((a[im+4] >> 0) & kmask2) | ((a[im+0] & kmask3) >> 2)));
  1064. sc4 = as_type<uchar2>((uint16_t)(((a[im+4] >> 4) & kmask2) | ((a[im+2] & kmask3) >> 2)));
  1065. float4 s = {0.f, 0.f, 0.f, 0.f};
  1066. float smin = 0;
  1067. for (int l = 0; l < n; ++l) {
  1068. s[0] += y1[l+ 0] * ((q1[l] & 0xF) + (qh[l] & hm1 ? 16 : 0));
  1069. s[1] += y1[l+32] * ((q1[l] >> 4) + (qh[l] & hm2 ? 16 : 0));
  1070. s[2] += y2[l+ 0] * ((q2[l] & 0xF) + (qh[l] & hm3 ? 16 : 0));
  1071. s[3] += y2[l+32] * ((q2[l] >> 4) + (qh[l] & hm4 ? 16 : 0));
  1072. smin += y1[l] * sc2[0] + y1[l+32] * sc2[1] + y2[l] * sc4[0] + y2[l+32] * sc4[1];
  1073. }
  1074. sumf += dall * (s[0] * sc1[0] + s[1] * sc1[1] + s[2] * sc3[0] + s[3] * sc3[1]) - dmin * smin;
  1075. }
  1076. sum[ith] = sumf;
  1077. //
  1078. // Accumulate the sum from all threads in the threadgroup
  1079. //
  1080. threadgroup_barrier(mem_flags::mem_threadgroup);
  1081. if (ith%4 == 0) {
  1082. sum[ith] += sum[ith+1] + sum[ith+2] + sum[ith+3];
  1083. }
  1084. threadgroup_barrier(mem_flags::mem_threadgroup);
  1085. if (ith%16 == 0) {
  1086. sum[ith] += sum[ith+4] + sum[ith+8] + sum[ith+12];
  1087. }
  1088. threadgroup_barrier(mem_flags::mem_threadgroup);
  1089. if (ith == 0) {
  1090. for (int i = 16; i < nth; i += 16) sum[0] += sum[i];
  1091. dst[r1*ne0 + r0] = sum[0];
  1092. }
  1093. }
  1094. kernel void kernel_mul_mat_q6_k_f32(
  1095. device const void * src0,
  1096. device const float * src1,
  1097. device float * dst,
  1098. constant int64_t & ne00,
  1099. constant int64_t & ne10,
  1100. constant int64_t & ne0,
  1101. threadgroup float * sum [[threadgroup(0)]],
  1102. uint2 tgpig[[threadgroup_position_in_grid]],
  1103. uint2 tpitg[[thread_position_in_threadgroup]],
  1104. uint2 tptg[[threads_per_threadgroup]]) {
  1105. const uint8_t kmask1 = 0x03;
  1106. const uint8_t kmask2 = 0x0C;
  1107. const uint8_t kmask3 = 0x30;
  1108. const uint8_t kmask4 = 0xC0;
  1109. const int nb = ne00/QK_K;
  1110. const int64_t r0 = tgpig.x;
  1111. const int64_t r1 = tgpig.y;
  1112. device const block_q6_k * x = (device const block_q6_k *) src0 + r0*nb;
  1113. device const float * yy = (device const float *) src1 + r1*ne10;
  1114. const int nth = tptg.x*tptg.y;
  1115. const int ith = tptg.y*tpitg.x + tpitg.y;
  1116. // Note: we absolutely assume that tptg.y = 16 and QK_K = 256!
  1117. const int iqs = 16 * tpitg.y;
  1118. const int ip = iqs / 128; // 0 or 1
  1119. const int il = (iqs - 128*ip)/16; // 0...7
  1120. const int n = 4;
  1121. const int l0 = n*il;
  1122. const int is = 8*ip + l0/16;
  1123. const int y_offset = 128*ip + l0;
  1124. const int q_offset_l = 64*ip + l0;
  1125. const int q_offset_h = 32*ip + l0;
  1126. float sumf = 0;
  1127. for (int i = tpitg.x; i < nb; i += tptg.x) {
  1128. device const uint8_t * ql = x[i].ql + q_offset_l;
  1129. device const uint8_t * qh = x[i].qh + q_offset_h;
  1130. device const int8_t * sc = x[i].scales + is;
  1131. device const float * y = yy + i * QK_K + y_offset;
  1132. const float dall = x[i].d;
  1133. float4 sums = {0.f, 0.f, 0.f, 0.f};
  1134. for (int l = 0; l < n; ++l) {
  1135. sums[0] += y[l+ 0] * ((int8_t)((ql[l+ 0] & 0xF) | ((qh[l] & kmask1) << 4)) - 32);
  1136. sums[1] += y[l+32] * ((int8_t)((ql[l+32] & 0xF) | ((qh[l] & kmask2) << 2)) - 32);
  1137. sums[2] += y[l+64] * ((int8_t)((ql[l+ 0] >> 4) | ((qh[l] & kmask3) << 0)) - 32);
  1138. sums[3] += y[l+96] * ((int8_t)((ql[l+32] >> 4) | ((qh[l] & kmask4) >> 2)) - 32);
  1139. }
  1140. sumf += dall * (sums[0] * sc[0] + sums[1] * sc[2] + sums[2] * sc[4] + sums[3] * sc[6]);
  1141. }
  1142. sum[ith] = sumf;
  1143. //
  1144. // Accumulate the sum from all threads in the threadgroup
  1145. //
  1146. threadgroup_barrier(mem_flags::mem_threadgroup);
  1147. if (ith%4 == 0) {
  1148. for (int i = 1; i < 4; ++i) sum[ith] += sum[ith + i];
  1149. }
  1150. threadgroup_barrier(mem_flags::mem_threadgroup);
  1151. if (ith%16 == 0) {
  1152. for (int i = 4; i < 16; i += 4) sum[ith] += sum[ith + i];
  1153. }
  1154. threadgroup_barrier(mem_flags::mem_threadgroup);
  1155. if (ith == 0) {
  1156. for (int i = 16; i < nth; i += 16) sum[0] += sum[i];
  1157. dst[r1*ne0 + r0] = sum[0];
  1158. }
  1159. }